summaryrefslogtreecommitdiff
path: root/src/dev/arm/pl111.cc
diff options
context:
space:
mode:
authorAndreas Hansson <andreas.hansson@arm.com>2013-01-07 13:05:36 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2013-01-07 13:05:36 -0500
commitfffdc6a45019639cd8f899fa81eeb732db3e6f8c (patch)
tree83daf8a2680a8d45974c632ccc68055712f69d65 /src/dev/arm/pl111.cc
parent79b44773023fa7a5e3e83f70d9a4f4809b10b003 (diff)
downloadgem5-fffdc6a45019639cd8f899fa81eeb732db3e6f8c.tar.xz
dev: Fix the Pl111 timings by separating pixel and DMA clock
This patch fixes the Pl111 timings by creating a separate clock for the pixel timings. The device clock is used for all interactions with the memory system, just like the AHB clock on the actual module. The result without this patch is that the module only is allowed to send one request every tick of the 24MHz clock which causes a huge backlog.
Diffstat (limited to 'src/dev/arm/pl111.cc')
-rw-r--r--src/dev/arm/pl111.cc26
1 files changed, 12 insertions, 14 deletions
diff --git a/src/dev/arm/pl111.cc b/src/dev/arm/pl111.cc
index c68f606cd..2973cda27 100644
--- a/src/dev/arm/pl111.cc
+++ b/src/dev/arm/pl111.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010 ARM Limited
+ * Copyright (c) 2010-2012 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -64,6 +64,7 @@ Pl111::Pl111(const Params *p)
clcdCrsrCtrl(0), clcdCrsrConfig(0), clcdCrsrPalette0(0),
clcdCrsrPalette1(0), clcdCrsrXY(0), clcdCrsrClip(0), clcdCrsrImsc(0),
clcdCrsrIcr(0), clcdCrsrRis(0), clcdCrsrMis(0),
+ pixelClock(p->pixel_clock),
vnc(p->vnc), bmp(NULL), width(LcdMaxWidth), height(LcdMaxHeight),
bytesPerPixel(4), startTime(0), startAddr(0), maxAddr(0), curAddr(0),
waterMark(0), dmaPendingNum(0), readEvent(this), fillFifoEvent(this),
@@ -440,14 +441,12 @@ Pl111::readFramebuffer()
schedule(intEvent, nextCycle());
curAddr = 0;
- startTime = curCycle();
+ startTime = curTick();
maxAddr = static_cast<Addr>(length * bytesPerPixel);
DPRINTF(PL111, " lcd frame buffer size of %d bytes \n", maxAddr);
- dmaPendingNum = 0;
-
fillFifo();
}
@@ -475,13 +474,15 @@ Pl111::fillFifo()
void
Pl111::dmaDone()
{
- Cycles maxFrameTime(lcdTiming2.cpl * height);
+ DPRINTF(PL111, "DMA Done\n");
+
+ Tick maxFrameTime = lcdTiming2.cpl * height * pixelClock;
--dmaPendingNum;
if (maxAddr == curAddr && !dmaPendingNum) {
- if ((curCycle() - startTime) > maxFrameTime) {
- warn("CLCD controller buffer underrun, took %d cycles when should"
+ if ((curTick() - startTime) > maxFrameTime) {
+ warn("CLCD controller buffer underrun, took %d ticks when should"
" have taken %d\n", curTick() - startTime, maxFrameTime);
lcdRis.underflow = 1;
if (!intEvent.scheduled())
@@ -500,14 +501,11 @@ Pl111::dmaDone()
// schedule the next read based on when the last frame started
// and the desired fps (i.e. maxFrameTime), we turn the
- // argument into a relative number of cycles in the future by
- // subtracting curCycle()
+ // argument into a relative number of cycles in the future
if (lcdControl.lcden)
- // @todo: This is a terrible way of doing the time
- // keeping, make it all relative
- schedule(readEvent,
- clockEdge(Cycles(startTime - curCycle() +
- maxFrameTime)));
+ schedule(readEvent, clockEdge(ticksToCycles(startTime -
+ curTick() +
+ maxFrameTime)));
}
if (dmaPendingNum > (maxOutstandingDma - waterMark))