diff options
author | Gabe Black <gabeblack@google.com> | 2018-10-12 04:58:50 -0700 |
---|---|---|
committer | Gabe Black <gabeblack@google.com> | 2018-10-12 23:45:51 +0000 |
commit | 9125a43f624653e6238dbb8713658cae2c5d43cd (patch) | |
tree | 268bab703026e5d6497492c97b736f125e875c59 /src/dev/arm/timer_sp804.cc | |
parent | 413b4e7431b20d9b29dbf66d6677a60205ddd357 (diff) | |
download | gem5-9125a43f624653e6238dbb8713658cae2c5d43cd.tar.xz |
arm: Use little endian packet accessors.
We know data is little endian, so we can use those accessors
explicitly.
Change-Id: Iee337109fcda134e1ac5a700e5141fd7060f9c45
Reviewed-on: https://gem5-review.googlesource.com/c/13457
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/dev/arm/timer_sp804.cc')
-rw-r--r-- | src/dev/arm/timer_sp804.cc | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/src/dev/arm/timer_sp804.cc b/src/dev/arm/timer_sp804.cc index f28ba7bf0..0549c6318 100644 --- a/src/dev/arm/timer_sp804.cc +++ b/src/dev/arm/timer_sp804.cc @@ -86,7 +86,7 @@ Sp804::Timer::read(PacketPtr pkt, Addr daddr) { switch(daddr) { case LoadReg: - pkt->set<uint32_t>(loadValue); + pkt->setLE<uint32_t>(loadValue); break; case CurrentReg: DPRINTF(Timer, "Event schedule for %d, clock=%d, prescale=%d\n", @@ -95,25 +95,26 @@ Sp804::Timer::read(PacketPtr pkt, Addr daddr) time = zeroEvent.when() - curTick(); time = time / clock / power(16, control.timerPrescale); DPRINTF(Timer, "-- returning counter at %d\n", time); - pkt->set<uint32_t>(time); + pkt->setLE<uint32_t>(time); break; case ControlReg: - pkt->set<uint32_t>(control); + pkt->setLE<uint32_t>(control); break; case RawISR: - pkt->set<uint32_t>(rawInt); + pkt->setLE<uint32_t>(rawInt); break; case MaskedISR: - pkt->set<uint32_t>(pendingInt); + pkt->setLE<uint32_t>(pendingInt); break; case BGLoad: - pkt->set<uint32_t>(loadValue); + pkt->setLE<uint32_t>(loadValue); break; default: panic("Tried to read SP804 timer at offset %#x\n", daddr); break; } - DPRINTF(Timer, "Reading %#x from Timer at offset: %#x\n", pkt->get<uint32_t>(), daddr); + DPRINTF(Timer, "Reading %#x from Timer at offset: %#x\n", + pkt->getLE<uint32_t>(), daddr); } Tick @@ -137,10 +138,11 @@ Sp804::write(PacketPtr pkt) void Sp804::Timer::write(PacketPtr pkt, Addr daddr) { - DPRINTF(Timer, "Writing %#x to Timer at offset: %#x\n", pkt->get<uint32_t>(), daddr); + DPRINTF(Timer, "Writing %#x to Timer at offset: %#x\n", + pkt->getLE<uint32_t>(), daddr); switch (daddr) { case LoadReg: - loadValue = pkt->get<uint32_t>(); + loadValue = pkt->getLE<uint32_t>(); restartCounter(loadValue); break; case CurrentReg: @@ -149,7 +151,7 @@ Sp804::Timer::write(PacketPtr pkt, Addr daddr) case ControlReg: bool old_enable; old_enable = control.timerEnable; - control = pkt->get<uint32_t>(); + control = pkt->getLE<uint32_t>(); if ((old_enable == 0) && control.timerEnable) restartCounter(loadValue); break; @@ -162,7 +164,7 @@ Sp804::Timer::write(PacketPtr pkt, Addr daddr) } break; case BGLoad: - loadValue = pkt->get<uint32_t>(); + loadValue = pkt->getLE<uint32_t>(); break; default: panic("Tried to write SP804 timer at offset %#x\n", daddr); |