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authorAndreas Sandberg <andreas.sandberg@arm.com>2015-08-07 09:59:13 +0100
committerAndreas Sandberg <andreas.sandberg@arm.com>2015-08-07 09:59:13 +0100
commit53e777d6838ac3ca80e6557626f9e99fd93dd0f7 (patch)
tree9029d3e7f1e158beac24761f2c9c690b3918d734 /src/dev/arm/vgic.cc
parent3e26756f1dfe1ddd1d7f5e458771c9bf79acb09a (diff)
downloadgem5-53e777d6838ac3ca80e6557626f9e99fd93dd0f7.tar.xz
base: Declare a type for context IDs
Context IDs used to be declared as ad hoc (usually as int). This changeset introduces a typedef for ContextIDs and a constant for invalid context IDs.
Diffstat (limited to 'src/dev/arm/vgic.cc')
-rw-r--r--src/dev/arm/vgic.cc10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/dev/arm/vgic.cc b/src/dev/arm/vgic.cc
index f4a3e8c3f..71d1d3bb6 100644
--- a/src/dev/arm/vgic.cc
+++ b/src/dev/arm/vgic.cc
@@ -90,7 +90,7 @@ VGic::readVCpu(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - vcpuAddr;
- int ctx_id = pkt->req->contextId();
+ ContextID ctx_id = pkt->req->contextId();
assert(ctx_id < VGIC_CPU_MAX);
struct vcpuIntData *vid = &vcpuData[ctx_id];
@@ -134,7 +134,7 @@ VGic::readCtrl(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - hvAddr;
- int ctx_id = pkt->req->contextId();
+ ContextID ctx_id = pkt->req->contextId();
DPRINTF(VGIC, "VGIC HVCtrl read register %#x\n", daddr);
@@ -228,7 +228,7 @@ VGic::writeVCpu(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - vcpuAddr;
- int ctx_id = pkt->req->contextId();
+ ContextID ctx_id = pkt->req->contextId();
assert(ctx_id < VGIC_CPU_MAX);
struct vcpuIntData *vid = &vcpuData[ctx_id];
@@ -275,7 +275,7 @@ VGic::writeCtrl(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - hvAddr;
- int ctx_id = pkt->req->contextId();
+ ContextID ctx_id = pkt->req->contextId();
DPRINTF(VGIC, "VGIC HVCtrl write register %#x <= %#x\n", daddr, pkt->get<uint32_t>());
@@ -380,7 +380,7 @@ VGic::unPostMaintInt(uint32_t cpu)
* This may raise a maintenance interrupt.
*/
void
-VGic::updateIntState(int ctx_id)
+VGic::updateIntState(ContextID ctx_id)
{
// @todo This should update APRs!