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authorGiacomo Travaglini <giacomo.travaglini@arm.com>2019-08-09 15:11:54 +0100
committerGiacomo Travaglini <giacomo.travaglini@arm.com>2019-08-12 18:17:45 +0000
commit377860544f28064c583f440e87fbb37567bae428 (patch)
tree88ed446f3190dd4cb98d8c077c10282c9bad85d4 /src/dev/arm
parent5e3b9693c83e536f3c6163eeb596ea0420300434 (diff)
downloadgem5-377860544f28064c583f440e87fbb37567bae428.tar.xz
dev-arm: Fix PCI node's interrupt-map property
The PCI host has an interrupt-map property which only works for a fixed setup of parent/child interrupt/address cells, which currently overlaps with GICv2. We want to make this flexible, so that the interrupt-map doesn't break if we change the interrupt/address-cells value, and the patch is aiming in that direction. This is also needed for GICv3 DTB autogeneration, since it is using different values than GICv2. Change-Id: If1c661ddcbc0c277c9d6b0e44a0fd3fe2427618c Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20052 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/dev/arm')
-rw-r--r--src/dev/arm/RealView.py25
1 files changed, 19 insertions, 6 deletions
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index b34ab006c..e6839ca7d 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2009-2018 ARM Limited
+# Copyright (c) 2009-2019 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -126,8 +126,9 @@ class GenericArmPciHost(GenericPciHost):
_dma_coherent = True
def generateDeviceTree(self, state):
- local_state = FdtState(addr_cells=3, size_cells=2, cpu_cells=1)
- intterrupt_cells = 1
+ local_state = FdtState(
+ addr_cells=3, size_cells=2,
+ cpu_cells=1, interrupt_cells=1)
node = FdtNode("pci")
@@ -143,7 +144,7 @@ class GenericArmPciHost(GenericPciHost):
# Cell sizes of child nodes/peripherals
node.append(local_state.addrCellsProperty())
node.append(local_state.sizeCellsProperty())
- node.append(FdtPropertyWords("#interrupt-cells", intterrupt_cells))
+ node.append(local_state.interruptCellsProperty())
# PCI address for CPU
node.append(FdtPropertyWords("reg",
state.addrCells(self.conf_base) +
@@ -167,12 +168,24 @@ class GenericArmPciHost(GenericPciHost):
node.append(FdtPropertyWords("ranges", ranges))
if str(self.int_policy) == 'ARM_PCI_INT_DEV':
- int_phandle = state.phandle(self._parent.unproxy(self).gic)
+ gic = self._parent.unproxy(self).gic
+ int_phandle = state.phandle(gic)
# Interrupt mapping
interrupts = []
+
+ # child interrupt specifier
+ child_interrupt = local_state.interruptCells(0x0)
+
+ # parent unit address
+ parent_addr = gic._state.addrCells(0x0)
+
for i in range(int(self.int_count)):
+ parent_interrupt = gic.interruptCells(0,
+ int(self.int_base) - 32 + i, 1)
+
interrupts += self.pciFdtAddr(device=i, addr=0) + \
- [0x0, int_phandle, 0, int(self.int_base) - 32 + i, 1]
+ child_interrupt + [int_phandle] + parent_addr + \
+ parent_interrupt
node.append(FdtPropertyWords("interrupt-map", interrupts))