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| author | Ali Saidi <saidi@eecs.umich.edu> | 2008-08-24 15:27:49 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2008-08-24 15:27:49 -0400 |
| commit | 3d5fe0c372a16f9178b348080c1c1bb24dd1d834 (patch) | |
| tree | fc05cff3dd5f90ec29baaea97bdeb545ae99c3d0 /src/dev/i8254xGBe.cc | |
| parent | 3633a916c299a1f5df9f6d34a0215cdae68a3e93 (diff) | |
| download | gem5-3d5fe0c372a16f9178b348080c1c1bb24dd1d834.tar.xz | |
IGbE: Patches I neglected to apply before pushing the previous igbe changeset
Diffstat (limited to 'src/dev/i8254xGBe.cc')
| -rw-r--r-- | src/dev/i8254xGBe.cc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/dev/i8254xGBe.cc b/src/dev/i8254xGBe.cc index ca60d2e7d..f362a7a0a 100644 --- a/src/dev/i8254xGBe.cc +++ b/src/dev/i8254xGBe.cc @@ -587,6 +587,8 @@ IGbE::postInterrupt(IntTypes t, bool now) regs.icr = regs.icr() | t; Tick itr_interval = Clock::Int::ns * 256 * regs.itr.interval(); + DPRINTF(EthernetIntr, "EINT: postInterrupt() curTick: %d itr: %d interval: %d\n", + curTick, regs.itr.interval(), itr_interval); if (regs.itr.interval() == 0 || now || lastInterrupt + itr_interval <= curTick) { if (interEvent.scheduled()) { @@ -652,6 +654,7 @@ IGbE::cpuPostInt() intrPost(); + lastInterrupt = curTick; } void @@ -1404,6 +1407,7 @@ IGbE::txWire() txBytes += txFifo.front()->length; txPackets++; + txFifoTick = false; txFifo.pop(); } else { |