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| author | Ali Saidi <saidi@eecs.umich.edu> | 2008-08-13 16:30:30 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2008-08-13 16:30:30 -0400 |
| commit | 05954e1ba7bb35674b0d12428788998d699f25cb (patch) | |
| tree | 0369697cd76738193d9f246ed31b3a22c83f6bf0 /src/dev/i8254xGBe.cc | |
| parent | 91d968783ecbcbe4bcd44e10964532303b367a05 (diff) | |
| download | gem5-05954e1ba7bb35674b0d12428788998d699f25cb.tar.xz | |
More subtle fixes to how interrupts are supposed to work in the device. Fix postedInterrupts statistics.
Diffstat (limited to 'src/dev/i8254xGBe.cc')
| -rw-r--r-- | src/dev/i8254xGBe.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/dev/i8254xGBe.cc b/src/dev/i8254xGBe.cc index 76e11b752..98040a252 100644 --- a/src/dev/i8254xGBe.cc +++ b/src/dev/i8254xGBe.cc @@ -588,7 +588,6 @@ IGbE::postInterrupt(IntTypes t, bool now) if (interEvent.scheduled()) { interEvent.deschedule(); } - postedInterrupts++; cpuPostInt(); } else { Tick int_time = lastInterrupt + itr_interval; @@ -612,6 +611,8 @@ void IGbE::cpuPostInt() { + postedInterrupts++; + if (!(regs.icr() & regs.imr)) { DPRINTF(Ethernet, "Interrupt Masked. Not Posting\n"); return; |