summaryrefslogtreecommitdiff
path: root/src/dev/i8254xGBe.hh
diff options
context:
space:
mode:
authorAli Saidi <saidi@eecs.umich.edu>2007-03-15 15:16:23 -0400
committerAli Saidi <saidi@eecs.umich.edu>2007-03-15 15:16:23 -0400
commit3a5a20769b2ba15905fc2e0a833a8ecbf3098646 (patch)
tree599ec2cc9b5dcc6a75ae42d7169d7087f3c8946a /src/dev/i8254xGBe.hh
parentc6188a226472c23f173b04b0fa86614cf717c9e7 (diff)
downloadgem5-3a5a20769b2ba15905fc2e0a833a8ecbf3098646.tar.xz
add all the registers we'll need to support for the Intel GbE device and support enough functionality make the driver think
the device is there, and in good working order. src/dev/SConscript: add intel gbe to the dev SCons file src/dev/i8254xGBe.cc: src/dev/i8254xGBe.hh: src/dev/i8254xGBe_defs.hh: use new manner of registers and implement all device registers that are touched through boot and ifup --HG-- extra : convert_revision : b1a1767f0fd31cd371e432cb48ac9a2e9f9291b5
Diffstat (limited to 'src/dev/i8254xGBe.hh')
-rw-r--r--src/dev/i8254xGBe.hh4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/dev/i8254xGBe.hh b/src/dev/i8254xGBe.hh
index ce4007263..fa9e65b22 100644
--- a/src/dev/i8254xGBe.hh
+++ b/src/dev/i8254xGBe.hh
@@ -54,13 +54,15 @@ class IGbE : public PciDev
int eeOpBits, eeAddrBits, eeDataBits;
uint8_t eeOpcode, eeAddr;
+ bool useFlowControl;
+
uint16_t flash[iGbReg::EEPROM_SIZE];
public:
struct Params : public PciDev::Params
{
- ;
+ bool use_flow_control;
};
IGbE(Params *params);