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authorAli Saidi <saidi@eecs.umich.edu>2008-08-13 17:41:56 -0400
committerAli Saidi <saidi@eecs.umich.edu>2008-08-13 17:41:56 -0400
commit549c43b2d0cd2411f7c8eda3f89ce1fd695c17e9 (patch)
treeef5161f366d27d4a333f0527bcaeef89cc1e1741 /src/dev/io_device.cc
parent05954e1ba7bb35674b0d12428788998d699f25cb (diff)
downloadgem5-549c43b2d0cd2411f7c8eda3f89ce1fd695c17e9.tar.xz
Add the ability for a DMA to tack on an extra delay after the DMA is actually finished.
Diffstat (limited to 'src/dev/io_device.cc')
-rw-r--r--src/dev/io_device.cc11
1 files changed, 7 insertions, 4 deletions
diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc
index 527397ed8..b86a2d313 100644
--- a/src/dev/io_device.cc
+++ b/src/dev/io_device.cc
@@ -138,7 +138,10 @@ DmaPort::recvTiming(PacketPtr pkt)
state->numBytes += pkt->req->getSize();
assert(state->totBytes >= state->numBytes);
if (state->totBytes == state->numBytes) {
- state->completionEvent->process();
+ if (state->delay)
+ state->completionEvent->schedule(state->delay + curTick);
+ else
+ state->completionEvent->process();
delete state;
}
delete pkt->req;
@@ -216,13 +219,13 @@ DmaPort::recvRetry()
void
DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
- uint8_t *data)
+ uint8_t *data, Tick delay)
{
assert(event);
assert(device->getState() == SimObject::Running);
- DmaReqState *reqState = new DmaReqState(event, this, size);
+ DmaReqState *reqState = new DmaReqState(event, this, size, delay);
DPRINTF(DMA, "Starting DMA for addr: %#x size: %d sched: %d\n", addr, size,
@@ -314,7 +317,7 @@ DmaPort::sendDma()
if (state->totBytes == state->numBytes) {
assert(!state->completionEvent->scheduled());
- state->completionEvent->schedule(curTick + lat);
+ state->completionEvent->schedule(curTick + lat + state->delay);
delete state;
delete pkt->req;
}