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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-01-25 20:32:26 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-01-25 20:32:26 -0800 |
| commit | 919c3e7fb6675c35fdc8d54aebb13c6e938de4b9 (patch) | |
| tree | 6b31a821004146c67e911307201908b24cbedddb /src/dev/mc146818.cc | |
| parent | 0449fb2b7a51f911d9814b79250047fa8f083829 (diff) | |
| download | gem5-919c3e7fb6675c35fdc8d54aebb13c6e938de4b9.tar.xz | |
Dev: Make the RTC device ignore writes to a read only bit.
Diffstat (limited to 'src/dev/mc146818.cc')
| -rw-r--r-- | src/dev/mc146818.cc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/dev/mc146818.cc b/src/dev/mc146818.cc index e5a81ff75..7b219e30c 100644 --- a/src/dev/mc146818.cc +++ b/src/dev/mc146818.cc @@ -35,6 +35,7 @@ #include <string> +#include "base/bitfield.hh" #include "base/time.hh" #include "base/trace.hh" #include "dev/mc146818.hh" @@ -87,9 +88,10 @@ MC146818::writeData(const uint8_t addr, const uint8_t data) else { switch (addr) { case RTC_STAT_REGA: - if (data != (RTCA_32768HZ | RTCA_1024HZ)) + // The "update in progress" bit is read only. + if ((data & ~RTCA_UIP) != (RTCA_32768HZ | RTCA_1024HZ)) panic("Unimplemented RTC register A value write!\n"); - stat_regA = data; + replaceBits(stat_regA, data, 6, 0); break; case RTC_STAT_REGB: if ((data & ~(RTCB_PRDC_IE | RTCB_SQWE)) != (RTCB_BIN | RTCB_24HR)) |