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author | Andreas Sandberg <andreas@sandberg.pp.se> | 2013-06-03 12:28:41 +0200 |
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committer | Andreas Sandberg <andreas@sandberg.pp.se> | 2013-06-03 12:28:41 +0200 |
commit | 14b8a17f284ad398e39636da907f3055462f75cd (patch) | |
tree | 02ecaf21bf1454cd717cd164f54b95cf56414766 /src/dev/mc146818.hh | |
parent | 74553c7d3fc5430752c0c08f2b319a99fb7ed632 (diff) | |
download | gem5-14b8a17f284ad398e39636da907f3055462f75cd.tar.xz |
dev: Clean up MC146818 register (A & B) handling
Rewrite reg A & B handling to use the bitunion stuff instead of bit
masking. Add better error messages when the kernel tries to enable
unsupported stuff.
Diffstat (limited to 'src/dev/mc146818.hh')
-rw-r--r-- | src/dev/mc146818.hh | 34 |
1 files changed, 32 insertions, 2 deletions
diff --git a/src/dev/mc146818.hh b/src/dev/mc146818.hh index 0c7baf47b..76cd40c37 100644 --- a/src/dev/mc146818.hh +++ b/src/dev/mc146818.hh @@ -33,6 +33,7 @@ #ifndef __DEV_MC146818_HH__ #define __DEV_MC146818_HH__ +#include "base/bitunion.hh" #include "sim/eventq_impl.hh" /** Real-Time Clock (MC146818) */ @@ -112,11 +113,40 @@ class MC146818 : public EventManager void setTime(const struct tm time); + BitUnion8(RtcRegA) + Bitfield<7> uip; /// 1 = date and time update in progress + Bitfield<6, 4> dv; /// Divider configuration + /** Rate selection + 0 = Disabled + For 32768 Hz time bases: + Freq = 32768Hz / 2**(n-1) for n >= 3 + Freq = 256Hz if n = 1 + Freq = 128Hz if n = 2 + Othwerise: + Freq = 32768Hz / 2**(n-1) + */ + Bitfield<3, 0> rs; + EndBitUnion(RtcRegA) + + /// Is the DV field in regA set to disabled? + static inline bool rega_dv_disabled(const RtcRegA ®); + + BitUnion8(RtcRegB) + Bitfield<7> set; /// stop clock updates + Bitfield<6> pie; /// 1 = enable periodic clock interrupt + Bitfield<5> aie; /// 1 = enable alarm interrupt + Bitfield<4> uie; /// 1 = enable update-ended interrupt + Bitfield<3> sqwe; /// 1 = output sqare wave at SQW pin + Bitfield<2> dm; /// 0 = BCD, 1 = Binary coded time + Bitfield<1> format24h; /// 0 = 12 hours, 1 = 24 hours + Bitfield<0> dse; /// USA Daylight Savings Time enable + EndBitUnion(RtcRegB) + /** RTC status register A */ - uint8_t stat_regA; + RtcRegA stat_regA; /** RTC status register B */ - uint8_t stat_regB; + RtcRegB stat_regB; public: MC146818(EventManager *em, const std::string &name, const struct tm time, |