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authorMitch Hayenga <mitch.hayenga@arm.com>2015-09-30 11:14:19 -0500
committerMitch Hayenga <mitch.hayenga@arm.com>2015-09-30 11:14:19 -0500
commit52d521e4337995d417b6f7b68644959edcc0c6b4 (patch)
tree9ca1e0e33ef7bced4c041b1ef8813c14d46822a1 /src/dev/mips/console
parentc05d268cfabbe26d032d73abcea6dc921c49e549 (diff)
downloadgem5-52d521e4337995d417b6f7b68644959edcc0c6b4.tar.xz
cpu: Change thread assignments for heterogenous SMT
Trying to run an SE system with varying threads per core (SMT cores + Non-SMT cores) caused failures due to the CPU id assignment logic. The comment about thread assignment (worrying about core 0 not having tid 0) seems not to be valid given that our configuration scripts initialize them in order. This removes that constraint so a heterogenously threaded sytem can work.
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