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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-07-07 09:51:04 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-07-07 09:51:04 +0100 |
| commit | e9c3d59aae58f8fcf77ce5cf4b985dc9e2a90de2 (patch) | |
| tree | 799c50d9a0b99f1623a16d9c1d49f4cb0d1fcbaf /src/dev/ns_gige.cc | |
| parent | 1dc5e63b889647a153f01351f560a3beaa41f293 (diff) | |
| download | gem5-e9c3d59aae58f8fcf77ce5cf4b985dc9e2a90de2.tar.xz | |
sim: Make the drain state a global typed enum
The drain state enum is currently a part of the Drainable
interface. The same state machine will be used by the DrainManager to
identify the global state of the simulator. Make the drain state a
global typed enum to better cater for this usage scenario.
Diffstat (limited to 'src/dev/ns_gige.cc')
| -rw-r--r-- | src/dev/ns_gige.cc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/dev/ns_gige.cc b/src/dev/ns_gige.cc index c525f6359..7a8d202c5 100644 --- a/src/dev/ns_gige.cc +++ b/src/dev/ns_gige.cc @@ -1068,7 +1068,7 @@ NSGigE::doRxDmaRead() assert(rxDmaState == dmaIdle || rxDmaState == dmaReadWaiting); rxDmaState = dmaReading; - if (dmaPending() || getDrainState() != Drainable::Running) + if (dmaPending() || getDrainState() != DrainState::Running) rxDmaState = dmaReadWaiting; else dmaRead(rxDmaAddr, rxDmaLen, &rxDmaReadEvent, (uint8_t*)rxDmaData); @@ -1099,7 +1099,7 @@ NSGigE::doRxDmaWrite() assert(rxDmaState == dmaIdle || rxDmaState == dmaWriteWaiting); rxDmaState = dmaWriting; - if (dmaPending() || getDrainState() != Running) + if (dmaPending() || getDrainState() != DrainState::Running) rxDmaState = dmaWriteWaiting; else dmaWrite(rxDmaAddr, rxDmaLen, &rxDmaWriteEvent, (uint8_t*)rxDmaData); @@ -1515,7 +1515,7 @@ NSGigE::doTxDmaRead() assert(txDmaState == dmaIdle || txDmaState == dmaReadWaiting); txDmaState = dmaReading; - if (dmaPending() || getDrainState() != Running) + if (dmaPending() || getDrainState() != DrainState::Running) txDmaState = dmaReadWaiting; else dmaRead(txDmaAddr, txDmaLen, &txDmaReadEvent, (uint8_t*)txDmaData); @@ -1546,7 +1546,7 @@ NSGigE::doTxDmaWrite() assert(txDmaState == dmaIdle || txDmaState == dmaWriteWaiting); txDmaState = dmaWriting; - if (dmaPending() || getDrainState() != Running) + if (dmaPending() || getDrainState() != DrainState::Running) txDmaState = dmaWriteWaiting; else dmaWrite(txDmaAddr, txDmaLen, &txDmaWriteEvent, (uint8_t*)txDmaData); |