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author | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-12-05 00:11:24 +0000 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-12-05 00:11:24 +0000 |
commit | 78275c9d2f918d245902c3c00a9486b4af8e8099 (patch) | |
tree | 9fe757b7ecc4246298d8e6eb18a83579eacba188 /src/dev/pcidev.hh | |
parent | abfb99780033f9abf68382fb9eb29e1af1a869ee (diff) | |
download | gem5-78275c9d2f918d245902c3c00a9486b4af8e8099.tar.xz |
dev: Rewrite PCI host functionality
The gem5's current PCI host functionality is very ad hoc. The current
implementations require PCI devices to be hooked up to the
configuration space via a separate configuration port. Devices query
the platform to get their config-space address range. Un-mapped parts
of the config space are intercepted using the XBar's default port
mechanism and a magic catch-all device (PciConfigAll).
This changeset redesigns the PCI host functionality to improve code
reuse and make config-space and interrupt mapping more
transparent. Existing platform code has been updated to use the new
PCI host and configured to stay backwards compatible (i.e., no
guest-side visible changes). The current implementation does not
expose any new functionality, but it can easily be extended with
features such as automatic interrupt mapping.
PCI devices now register themselves with a PCI host controller. The
host controller interface is defined in the abstract base class
PciHost. Registration is done by PciHost::registerDevice() which takes
the device, its bus position (bus/dev/func tuple), and its interrupt
pin (INTA-INTC) as a parameter. The registration interface returns a
PciHost::DeviceInterface that the PCI device can use to query memory
mappings and signal interrupts.
The host device manages the entire PCI configuration space. Accesses
to devices decoded into the devices bus position and then forwarded to
the correct device.
Basic PCI host functionality is implemented in the GenericPciHost base
class. Most platforms can use this class as a basic PCI controller. It
provides the following functionality:
* Configurable configuration space decoding. The number of bits
dedicated to a device is a prameter, making it possible to support
both CAM, ECAM, and legacy mappings.
* Basic interrupt mapping using the interruptLine value from a
device's configuration space. This behavior is the same as in the
old implementation. More advanced controllers can override the
interrupt mapping method to dynamically assign host interrupts to
PCI devices.
* Simple (base + addr) remapping from the PCI bus's address space to
physical addresses for PIO, memory, and DMA.
Diffstat (limited to 'src/dev/pcidev.hh')
-rw-r--r-- | src/dev/pcidev.hh | 87 |
1 files changed, 20 insertions, 67 deletions
diff --git a/src/dev/pcidev.hh b/src/dev/pcidev.hh index 0afcba154..a7a2137b0 100644 --- a/src/dev/pcidev.hh +++ b/src/dev/pcidev.hh @@ -54,7 +54,7 @@ #include "dev/dma_device.hh" #include "dev/pcireg.h" -#include "dev/platform.hh" +#include "dev/pci/host.hh" #include "params/PciDevice.hh" #include "sim/byteswap.hh" @@ -64,46 +64,17 @@ #define BAR_IO_SPACE(x) ((x) & BAR_IO_SPACE_BIT) #define BAR_NUMBER(x) (((x) - PCI0_BASE_ADDR0) >> 0x2); - - /** * PCI device, base implementation is only config space. */ class PciDevice : public DmaDevice { - class PciConfigPort : public SimpleTimingPort - { - protected: - PciDevice *device; - - Tick recvAtomic(PacketPtr pkt) override; - - AddrRangeList getAddrRanges() const override; - - Platform *platform; - - int busId; - int deviceId; - int functionId; - - Addr configAddr; - - public: - PciConfigPort(PciDevice *dev, int busid, int devid, int funcid, - Platform *p); - }; - - public: - typedef PciDeviceParams Params; - const Params * - params() const - { - return dynamic_cast<const Params *>(_params); - } - protected: + const PciBusAddr _busAddr; + /** The current config space. */ PCIConfig config; + /** The capability list structures and base addresses * @{ */ @@ -190,14 +161,7 @@ class PciDevice : public DmaDevice return true; } - private: - Platform *platform; - - protected: - Tick pioDelay; - Tick configDelay; - PciConfigPort configPort; - + public: // Host configuration interface /** * Write to the PCI config space data that is stored locally. This may be * overridden by the device but at some point it will eventually call this @@ -215,21 +179,21 @@ class PciDevice : public DmaDevice */ virtual Tick readConfig(PacketPtr pkt); - public: - Addr pciToDma(Addr pciAddr) const - { return platform->pciToDma(pciAddr); } + protected: + PciHost::DeviceInterface hostInterface; + + Tick pioDelay; + Tick configDelay; - void - intrPost() - { platform->postPciInt(letoh(config.interruptLine)); } + public: + Addr pciToDma(Addr pci_addr) const { + return hostInterface.dmaAddr(pci_addr); + } - void - intrClear() - { platform->clearPciInt(letoh(config.interruptLine)); } + void intrPost() { hostInterface.postInt(); } + void intrClear() { hostInterface.clearInt(); } - uint8_t - interruptLine() - { return letoh(config.interruptLine); } + uint8_t interruptLine() const { return letoh(config.interruptLine); } /** * Determine the address ranges that this device responds to. @@ -241,11 +205,9 @@ class PciDevice : public DmaDevice /** * Constructor for PCI Dev. This function copies data from the * config file object PCIConfigData and registers the device with - * a PciConfigAll object. + * a PciHost object. */ - PciDevice(const Params *params); - - void init() override; + PciDevice(const PciDeviceParams *params); /** * Serialize this object to the given output stream. @@ -260,15 +222,6 @@ class PciDevice : public DmaDevice */ void unserialize(CheckpointIn &cp) override; - - BaseSlavePort &getSlavePort(const std::string &if_name, - PortID idx = InvalidPortID) override - { - if (if_name == "config") { - return configPort; - } - return DmaDevice::getSlavePort(if_name, idx); - } - + const PciBusAddr &busAddr() const { return _busAddr; } }; #endif // __DEV_PCIDEV_HH__ |