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author | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-08-07 09:59:23 +0100 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-08-07 09:59:23 +0100 |
commit | cd098a7e84c05d67026e3812f6952fbf3b9e070e (patch) | |
tree | 1972a22d2c857187d8731255836b980cc796f31d /src/dev/pcireg.h | |
parent | f7ff27afe8610460e88b7032391d679a3b8920f4 (diff) | |
download | gem5-cd098a7e84c05d67026e3812f6952fbf3b9e070e.tar.xz |
dev: Add a simple DMA engine that can be used by devices
Add a simple DMA engine that sits behind a FIFO. This engine can be
used by devices that need to read large amounts of data (e.g., display
controllers). Most aspects of the controller, such as FIFO size,
maximum number of in-flight accesses, and maximum request sizes can be
configured.
The DMA copies blocks of data into its FIFO. Transfers are initiated
with a call to startFill() command that takes a start address and a
size. Advanced users can create a derived class that overrides the
onEndOfBlock() callback that is triggered when the last request to a
block has been issued. At this point, the DMA engine is ready to start
fetching a new block of data, potentially from a different address
range.
The DMA engine stops issuing new requests while it is draining. Care
must be taken to ensure that devices that are fed by a DMA engine are
suspended while the system is draining to avoid buffer underruns.
Diffstat (limited to 'src/dev/pcireg.h')
0 files changed, 0 insertions, 0 deletions