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authorAli Saidi <saidi@eecs.umich.edu>2007-03-09 16:56:39 -0500
committerAli Saidi <saidi@eecs.umich.edu>2007-03-09 16:56:39 -0500
commit58f69391cac4dcc3696470d08756d0c5ff308963 (patch)
treec97d3888e74ccd3cf3ffdb4ee96fd475c8c8c29a /src/dev/sparc/iob.cc
parent9d026ac006f56ce735c3c6a9e37cfefcfb21523a (diff)
downloadgem5-58f69391cac4dcc3696470d08756d0c5ff308963.tar.xz
implement ipi stufff for SPARC
src/arch/alpha/utility.hh: src/arch/mips/utility.hh: src/arch/sparc/utility.hh: src/arch/x86/utility.hh: add hook for system to startup the cpu or not... in the case of FS sparc, only the first cpu would get spunup.. the rest sit in an idle state until they get an ipi src/arch/sparc/isa/decoder.isa: handle writable bits of strandstatus register in miscregfile src/arch/sparc/miscregfile.hh: some constants for the strand status register src/arch/sparc/ua2005.cc: properly implement the strand status register src/dev/sparc/iob.cc: implement ipi generation properly src/sim/system.cc: call into the ISA to start the CPU (or not) --HG-- extra : convert_revision : 0003b2032337d8a031a9fc044da726dbb2a9e36f
Diffstat (limited to 'src/dev/sparc/iob.cc')
-rw-r--r--src/dev/sparc/iob.cc29
1 files changed, 24 insertions, 5 deletions
diff --git a/src/dev/sparc/iob.cc b/src/dev/sparc/iob.cc
index 2cff02a99..6bd40b631 100644
--- a/src/dev/sparc/iob.cc
+++ b/src/dev/sparc/iob.cc
@@ -38,6 +38,7 @@
#include <cstring>
#include "arch/sparc/isa_traits.hh"
+#include "arch/sparc/faults.hh"
#include "base/trace.hh"
#include "cpu/intr_control.hh"
#include "dev/sparc/iob.hh"
@@ -45,6 +46,7 @@
#include "mem/port.hh"
#include "mem/packet_access.hh"
#include "sim/builder.hh"
+#include "sim/faults.hh"
#include "sim/system.hh"
Iob::Iob(Params *p)
@@ -261,13 +263,30 @@ Iob::receiveDeviceInterrupt(DeviceId devid)
void
Iob::generateIpi(Type type, int cpu_id, int vector)
{
- // Only handle interrupts for the moment... Cpu Idle/reset/resume will be
- // later
- if (type != 0)
+ SparcISA::SparcFault<SparcISA::PowerOnReset> *por = new SparcISA::PowerOnReset();
+ if (cpu_id >= sys->getNumCPUs())
return;
- assert(type == 0);
- ic->post(cpu_id, SparcISA::IT_INT_VEC, vector);
+ switch (type) {
+ case 0: // interrupt
+ ic->post(cpu_id, SparcISA::IT_INT_VEC, vector);
+ break;
+ case 1: // reset
+ warn("Sending reset to CPU: %d\n", cpu_id);
+ if (vector != por->trapType())
+ panic("Don't know how to set non-POR reset to cpu\n");
+ por->invoke(sys->threadContexts[cpu_id]);
+ sys->threadContexts[cpu_id]->activate();
+ break;
+ case 2: // idle -- this means stop executing and don't wake on interrupts
+ sys->threadContexts[cpu_id]->halt();
+ break;
+ case 3: // resume
+ sys->threadContexts[cpu_id]->activate();
+ break;
+ default:
+ panic("Invalid type to generate ipi\n");
+ }
}
bool