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authorSteve Reinhardt <stever@eecs.umich.edu>2006-05-26 14:17:33 -0400
committerSteve Reinhardt <stever@eecs.umich.edu>2006-05-26 14:17:33 -0400
commite533fad711fce66bf2e4a6669baeb8eaf02799e1 (patch)
tree0fdb6011df3204031dd1dec784649aa3cdac5613 /src/dev/tsunami_cchip.cc
parentda6a7b1263cf624790f06a5f944366fb113dffc8 (diff)
downloadgem5-e533fad711fce66bf2e4a6669baeb8eaf02799e1.tar.xz
Significant rework of Packet class interface:
- new constructor guarantees initialization of most fields - flags track status of non-guaranteed fields (addr, size, src) - accessor functions (getAddr() etc.) check status on access - Command & Result classes are nested in Packet class scope - Command now built from vector of behavior bits - string version of Command for tracing - reinitFromRequest() and makeTimingResponse() encapsulate common manipulations of existing packets src/cpu/simple/atomic.cc: src/cpu/simple/base.cc: src/cpu/simple/timing.cc: src/dev/alpha_console.cc: src/dev/ide_ctrl.cc: src/dev/io_device.cc: src/dev/io_device.hh: src/dev/isa_fake.cc: src/dev/ns_gige.cc: src/dev/pciconfigall.cc: src/dev/sinic.cc: src/dev/tsunami_cchip.cc: src/dev/tsunami_io.cc: src/dev/tsunami_pchip.cc: src/dev/uart8250.cc: src/mem/bus.cc: src/mem/bus.hh: src/mem/physical.cc: src/mem/port.cc: src/mem/port.hh: src/mem/request.hh: Update for new Packet interface. --HG-- extra : convert_revision : 9973d09ea4fa61795f23772a7d3995fa4df5c269
Diffstat (limited to 'src/dev/tsunami_cchip.cc')
-rw-r--r--src/dev/tsunami_cchip.cc28
1 files changed, 14 insertions, 14 deletions
diff --git a/src/dev/tsunami_cchip.cc b/src/dev/tsunami_cchip.cc
index 7206a61bb..146321b9f 100644
--- a/src/dev/tsunami_cchip.cc
+++ b/src/dev/tsunami_cchip.cc
@@ -71,17 +71,17 @@ TsunamiCChip::TsunamiCChip(Params *p)
Tick
TsunamiCChip::read(Packet *pkt)
{
- DPRINTF(Tsunami, "read va=%#x size=%d\n", pkt->addr, pkt->size);
+ DPRINTF(Tsunami, "read va=%#x size=%d\n", pkt->getAddr(), pkt->getSize());
- assert(pkt->result == Unknown);
- assert(pkt->addr >= pioAddr && pkt->addr < pioAddr + pioSize);
+ assert(pkt->result == Packet::Unknown);
+ assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
pkt->time += pioDelay;
- Addr regnum = (pkt->addr - pioAddr) >> 6;
- Addr daddr = (pkt->addr - pioAddr);
+ Addr regnum = (pkt->getAddr() - pioAddr) >> 6;
+ Addr daddr = (pkt->getAddr() - pioAddr);
pkt->allocate();
- switch (pkt->size) {
+ switch (pkt->getSize()) {
case sizeof(uint64_t):
if (daddr & TSDEV_CC_BDIMS)
@@ -173,9 +173,9 @@ TsunamiCChip::read(Packet *pkt)
panic("invalid access size(?) for tsunami register!\n");
}
DPRINTF(Tsunami, "Tsunami CChip: read regnum=%#x size=%d data=%lld\n",
- regnum, pkt->size, pkt->get<uint64_t>());
+ regnum, pkt->getSize(), pkt->get<uint64_t>());
- pkt->result = Success;
+ pkt->result = Packet::Success;
return pioDelay;
}
@@ -185,14 +185,14 @@ TsunamiCChip::write(Packet *pkt)
pkt->time += pioDelay;
- assert(pkt->addr >= pioAddr && pkt->addr < pioAddr + pioSize);
- Addr daddr = pkt->addr - pioAddr;
- Addr regnum = (pkt->addr - pioAddr) >> 6 ;
+ assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+ Addr daddr = pkt->getAddr() - pioAddr;
+ Addr regnum = (pkt->getAddr() - pioAddr) >> 6 ;
- assert(pkt->size == sizeof(uint64_t));
+ assert(pkt->getSize() == sizeof(uint64_t));
- DPRINTF(Tsunami, "write - addr=%#x value=%#x\n", pkt->addr, pkt->get<uint64_t>());
+ DPRINTF(Tsunami, "write - addr=%#x value=%#x\n", pkt->getAddr(), pkt->get<uint64_t>());
bool supportedWrite = false;
@@ -362,7 +362,7 @@ TsunamiCChip::write(Packet *pkt)
panic("default in cchip read reached, accessing 0x%x\n");
} // swtich(regnum)
} // not BIG_TSUNAMI write
- pkt->result = Success;
+ pkt->result = Packet::Success;
return pioDelay;
}