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authorGabe Black <gblack@eecs.umich.edu>2008-10-11 01:45:25 -0700
committerGabe Black <gblack@eecs.umich.edu>2008-10-11 01:45:25 -0700
commit539563e04b4925e88c28cb44f5180915c3b3a5be (patch)
treede3c6c045eff66c6ba6e5f29589bb20c7c3e9ad1 /src/dev/x86/I8259.py
parent119e127d7128edfb729101b92ca160c1f01391ca (diff)
downloadgem5-539563e04b4925e88c28cb44f5180915c3b3a5be.tar.xz
X86: Make the CMOS and I8259 devices use IntDev and IntPin.
Diffstat (limited to 'src/dev/x86/I8259.py')
-rw-r--r--src/dev/x86/I8259.py13
1 files changed, 12 insertions, 1 deletions
diff --git a/src/dev/x86/I8259.py b/src/dev/x86/I8259.py
index 19670dde9..d241b092a 100644
--- a/src/dev/x86/I8259.py
+++ b/src/dev/x86/I8259.py
@@ -29,9 +29,20 @@
from m5.params import *
from m5.proxy import *
from Device import BasicPioDevice
+from X86IntPin import X86IntPin
+
+class X86I8259CascadeMode(Enum):
+ map = {'I8259Master' : 0,
+ 'I8259Slave' : 1,
+ 'I8259Single' : 2
+ }
class I8259(BasicPioDevice):
type = 'I8259'
cxx_class='X86ISA::I8259'
pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
- master = Param.I8259('The master PIC this PIC is cascaded with, if any')
+ output = Param.X86IntPin('The pin this I8259 drives')
+ mode = Param.X86I8259CascadeMode('How this I8259 is cascaded')
+
+ def pin(self, line):
+ return X86IntPin(device=self, line=line)