summaryrefslogtreecommitdiff
path: root/src/dev/x86/SouthBridge.py
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2009-08-02 18:01:13 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-08-02 18:01:13 -0700
commit38c2af17a557e5b7420a2ad15b13316acbde588d (patch)
treec146c106788592d89789e9053565942f3913e00b /src/dev/x86/SouthBridge.py
parent80aa771dbc1a779b5c6fc7341e9b52f968cb7123 (diff)
downloadgem5-38c2af17a557e5b7420a2ad15b13316acbde588d.tar.xz
X86: Set up the IDE device correctly, ie. with and using legacy ports.
Diffstat (limited to 'src/dev/x86/SouthBridge.py')
-rw-r--r--src/dev/x86/SouthBridge.py3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py
index d89ed9dc6..2d1827998 100644
--- a/src/dev/x86/SouthBridge.py
+++ b/src/dev/x86/SouthBridge.py
@@ -86,7 +86,8 @@ class SouthBridge(SimObject):
ide.BAR3Size = '3B'
ide.BAR3LegacyIO = True
ide.BAR4 = 1
- ide.Command = 1
+ ide.Command = 0
+ ide.ProgIF = 0x80
ide.InterruptLine = 14
ide.InterruptPin = 1