X86: Add a dummy minimal DMA controller that doesn't do anything.

1 files changed, 4 insertions, 0 deletions

diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py
index 8a9bea01b..bbe3ad102 100644
--- a/src/dev/x86/SouthBridge.py
+++ b/src/dev/x86/SouthBridge.py
@@ -30,6 +30,7 @@ from m5.params import *
 from m5.proxy import *
 from Cmos import Cmos
 from I82094AA import I82094AA
+from I8237 import I8237
 from I8254 import I8254
 from I8259 import I8259
 from PcSpeaker import PcSpeaker
@@ -47,6 +48,7 @@ class SouthBridge(SimObject):
     _pic1 = I8259(pio_addr=x86IOAddress(0x20), mode='I8259Master')
     _pic2 = I8259(pio_addr=x86IOAddress(0xA0), mode='I8259Slave')
     _cmos = Cmos(pio_addr=x86IOAddress(0x70))
+    _dma1 = I8237(pio_addr=x86IOAddress(0x0))
     _pit = I8254(pio_addr=x86IOAddress(0x40))
     _speaker = PcSpeaker(pio_addr=x86IOAddress(0x61))
     _io_apic = I82094AA(pio_addr=0xFEC00000)
@@ -54,6 +56,7 @@ class SouthBridge(SimObject):
     pic1 = Param.I8259(_pic1, "Master PIC")
     pic2 = Param.I8259(_pic2, "Slave PIC")
     cmos = Param.Cmos(_cmos, "CMOS memory and real time clock device")
+    dma1 = Param.I8237(_dma1, "The first dma controller")
     pit = Param.I8254(_pit, "Programmable interval timer")
     speaker = Param.PcSpeaker(_speaker, "PC speaker")
     io_apic = Param.I82094AA(_io_apic, "I/O APIC")
@@ -67,6 +70,7 @@ class SouthBridge(SimObject):
         self.speaker.i8254 = self.pit
         # Connect to the bus
         self.cmos.pio = bus.port
+        self.dma1.pio = bus.port
         self.pic1.pio = bus.port
         self.pic2.pio = bus.port
         self.pit.pio = bus.port