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authorGabe Black <gblack@eecs.umich.edu>2008-10-11 01:31:32 -0700
committerGabe Black <gblack@eecs.umich.edu>2008-10-11 01:31:32 -0700
commit8c532d629732e93fa23a38328b653eb4c2314936 (patch)
tree99b731ecb4beba3f6db44f54c24bcb50041baf20 /src/dev/x86/i8259.hh
parentcf9afbba510ceac86e011a4b37ec848cd7f7a6ed (diff)
downloadgem5-8c532d629732e93fa23a38328b653eb4c2314936.tar.xz
X86: Hook the CMOS device to the I8259 PICs.
Diffstat (limited to 'src/dev/x86/i8259.hh')
-rw-r--r--src/dev/x86/i8259.hh14
1 files changed, 11 insertions, 3 deletions
diff --git a/src/dev/x86/i8259.hh b/src/dev/x86/i8259.hh
index 131adc93f..c51ab1a6a 100644
--- a/src/dev/x86/i8259.hh
+++ b/src/dev/x86/i8259.hh
@@ -41,7 +41,7 @@ class I8259 : public BasicPioDevice
{
protected:
Tick latency;
- bool master;
+ I8259 *master;
// Interrupt Request Register
uint8_t IRR;
@@ -50,10 +50,16 @@ class I8259 : public BasicPioDevice
// Interrupt Mask Register
uint8_t IMR;
- bool edgeTriggered;
bool cascadeMode;
- bool expectICW4;
+ // A bit vector of lines with slaves attached, or the slave id, depending
+ // on if this is a master or slave PIC.
+ uint8_t cascadeBits;
+
+ bool edgeTriggered;
bool readIRR;
+
+ // State machine information for reading in initialization control words.
+ bool expectICW4;
int initControlWord;
public:
@@ -77,6 +83,8 @@ class I8259 : public BasicPioDevice
Tick read(PacketPtr pkt);
Tick write(PacketPtr pkt);
+
+ void signalInterrupt(int line);
};
}; // namespace X86ISA