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| author | Gabe Black <gblack@eecs.umich.edu> | 2008-06-12 00:56:54 -0400 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2008-06-12 00:56:54 -0400 |
| commit | 1f5b992b582f0d8de792df24a81d4a25642b3e45 (patch) | |
| tree | d999408f4be49c380dc6846f2d2d479064cba6e3 /src/dev/x86/pc.cc | |
| parent | 16e26fbf03260f362f6090503626f2068d76f89e (diff) | |
| download | gem5-1f5b992b582f0d8de792df24a81d4a25642b3e45.tar.xz | |
X86: Make the platform object initialize channel 0 of the PIT.
Diffstat (limited to 'src/dev/x86/pc.cc')
| -rw-r--r-- | src/dev/x86/pc.cc | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/src/dev/x86/pc.cc b/src/dev/x86/pc.cc index 148ba92f7..0881672d2 100644 --- a/src/dev/x86/pc.cc +++ b/src/dev/x86/pc.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2004-2005 The Regents of The University of Michigan + * Copyright (c) 2008 The Regents of The University of Michigan * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -37,6 +37,7 @@ #include <vector> #include "arch/x86/x86_traits.hh" +#include "dev/intel_8254_timer.hh" #include "cpu/intr_control.hh" #include "dev/simconsole.hh" #include "dev/x86/pc.hh" @@ -48,10 +49,25 @@ using namespace TheISA; PC::PC(const Params *p) : Platform(p), system(p->system) { + southBridge = NULL; // set the back pointer from the system to myself system->platform = this; } +void +PC::init() +{ + assert(southBridge); + Intel8254Timer & timer = southBridge->pit.pit; + //Timer 0, mode 2, no bcd, 16 bit count + timer.writeControl(0x34); + //Timer 0, latch command + timer.writeControl(0x00); + //Write a 16 bit count of 0 + timer.counter0.write(0); + timer.counter0.write(0); +} + Tick PC::intrFrequency() { |