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authorGabe Black <gblack@eecs.umich.edu>2008-02-26 23:38:01 -0500
committerGabe Black <gblack@eecs.umich.edu>2008-02-26 23:38:01 -0500
commit7bde0285e50e3903e38dd9e6fd59ea4a98f41079 (patch)
treed2f1642ba2d5345ea66a54f1aade40791ce15cee /src/dev/x86
parent8c0baf2ce478b16d351feb1f0ce147049f3a04f6 (diff)
downloadgem5-7bde0285e50e3903e38dd9e6fd59ea4a98f41079.tar.xz
X86: Get PCI config space to work, and adjust address space prefix numbering scheme.
--HG-- extra : convert_revision : 2b382f478ee8cde3a35aa4c105196f200bc7afa6
Diffstat (limited to 'src/dev/x86')
-rw-r--r--src/dev/x86/Opteron.py8
-rw-r--r--src/dev/x86/opteron.cc7
2 files changed, 13 insertions, 2 deletions
diff --git a/src/dev/x86/Opteron.py b/src/dev/x86/Opteron.py
index 435ecccb6..cb015e2e7 100644
--- a/src/dev/x86/Opteron.py
+++ b/src/dev/x86/Opteron.py
@@ -3,8 +3,16 @@ from m5.proxy import *
from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr
from Uart import Uart8250
from Platform import Platform
+from Pci import PciConfigAll
from SimConsole import SimConsole
class Opteron(Platform):
type = 'Opteron'
system = Param.System(Parent.any, "system")
+
+ pciconfig = PciConfigAll()
+
+ def attachIO(self, bus):
+ self.pciconfig.pio = bus.default
+ bus.responder_set = True
+ bus.responder = self.pciconfig
diff --git a/src/dev/x86/opteron.cc b/src/dev/x86/opteron.cc
index df28e58de..ba46f2dfa 100644
--- a/src/dev/x86/opteron.cc
+++ b/src/dev/x86/opteron.cc
@@ -36,6 +36,7 @@
#include <string>
#include <vector>
+#include "arch/x86/x86_traits.hh"
#include "cpu/intr_control.hh"
#include "dev/simconsole.hh"
#include "dev/x86/opteron.hh"
@@ -95,8 +96,10 @@ Opteron::pciToDma(Addr pciAddr) const
Addr
Opteron::calcConfigAddr(int bus, int dev, int func)
{
- panic("Need implementation\n");
- M5_DUMMY_RETURN
+ assert(func < 8);
+ assert(dev < 32);
+ assert(bus == 0);
+ return (PhysAddrPrefixPciConfig | (func << 8) | (dev << 11));
}
Opteron *