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| author | Gabe Black <gabeblack@google.com> | 2019-04-22 19:45:10 -0700 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2019-04-28 01:19:40 +0000 |
| commit | cdcc55a6a8fe9b4625b316a8d8845366ccfa71c9 (patch) | |
| tree | 893cea35432466600b55a2e4434ed61ba1e28f69 /src/dev/x86 | |
| parent | 3cfff8574a19536e2b3d057b43b59fcf35932c81 (diff) | |
| download | gem5-cdcc55a6a8fe9b4625b316a8d8845366ccfa71c9.tar.xz | |
mem: Minimize the use of MemObject.
MemObject doesn't provide anything beyond its base ClockedObject any
more, so this change removes it from most inheritance hierarchies.
Occasionally MemObject is replaced with SimObject when I was fairly
confident that the extra functionality of ClockedObject wasn't needed.
Change-Id: Ic014ab61e56402e62548e8c831eb16e26523fdce
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18289
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/dev/x86')
| -rw-r--r-- | src/dev/x86/intdev.hh | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/dev/x86/intdev.hh b/src/dev/x86/intdev.hh index 1a49bb3e2..2e3e99df0 100644 --- a/src/dev/x86/intdev.hh +++ b/src/dev/x86/intdev.hh @@ -49,7 +49,6 @@ #include "arch/x86/intmessage.hh" #include "arch/x86/x86_traits.hh" -#include "mem/mem_object.hh" #include "mem/mport.hh" #include "params/X86IntLine.hh" #include "params/X86IntSinkPin.hh" @@ -68,7 +67,7 @@ class IntDevice IntDevice * device; public: - IntSlavePort(const std::string& _name, MemObject* _parent, + IntSlavePort(const std::string& _name, SimObject* _parent, IntDevice* dev) : MessageSlavePort(_name, _parent), device(dev) { @@ -92,7 +91,7 @@ class IntDevice IntDevice* device; Tick latency; public: - IntMasterPort(const std::string& _name, MemObject* _parent, + IntMasterPort(const std::string& _name, SimObject* _parent, IntDevice* dev, Tick _latency) : MessageMasterPort(_name, _parent), device(dev), latency(_latency) { @@ -112,7 +111,7 @@ class IntDevice IntMasterPort intMasterPort; public: - IntDevice(MemObject * parent, Tick latency = 0) : + IntDevice(SimObject * parent, Tick latency = 0) : intMasterPort(parent->name() + ".int_master", parent, this, latency) { } |