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| author | Ciro Santilli <ciro.santilli@arm.com> | 2018-09-12 15:33:01 +0100 |
|---|---|---|
| committer | Ciro Santilli <ciro.santilli@arm.com> | 2018-09-12 15:25:00 +0000 |
| commit | 2045a5c199c7c7597684c5d7501d5fb55aff9608 (patch) | |
| tree | cb9923b2da2c424a04fc9ea50cb892b787de0cb9 /src/dev | |
| parent | 3c3ca64b5f0dd9eef7b1ce1c65cc6e8e9147dd38 (diff) | |
| download | gem5-2045a5c199c7c7597684c5d7501d5fb55aff9608.tar.xz | |
dev-arm: fix build to missing Pl390 to Gicv2 rename
Change-Id: I6756f2c789aaca410d201aa64147443b66afee39
Reviewed-on: https://gem5-review.googlesource.com/12645
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/dev')
| -rw-r--r-- | src/dev/arm/RealView.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index 769014163..e8a7cd6d4 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -749,7 +749,7 @@ class RealViewEB(RealView): realview_io = RealViewCtrl(pio_addr=0x10000000, idreg=0x01400500) mcc = VExpressMCC() dcc = CoreTile2A15DCC() - gic = Pl390(dist_addr=0x10041000, cpu_addr=0x10040000) + gic = GicV2(dist_addr=0x10041000, cpu_addr=0x10040000) timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) clcd = Pl111(pio_addr=0x10020000, int_num=23) |