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authorGabe Black <gblack@eecs.umich.edu>2008-10-12 13:51:48 -0700
committerGabe Black <gblack@eecs.umich.edu>2008-10-12 13:51:48 -0700
commitc35da8e495e9f2697a252e8e828e6d7760a8a2db (patch)
tree82c72dbb3da2e1d54b66c978448b7cca0c937286 /src/dev
parentec9d3aad71ec75b3f7b5ea96dd41f067a9261392 (diff)
downloadgem5-c35da8e495e9f2697a252e8e828e6d7760a8a2db.tar.xz
X86: Actually use the extra vector bits we get from ICW2.
Diffstat (limited to 'src/dev')
-rw-r--r--src/dev/x86/i8259.cc3
-rw-r--r--src/dev/x86/i8259.hh5
2 files changed, 6 insertions, 2 deletions
diff --git a/src/dev/x86/i8259.cc b/src/dev/x86/i8259.cc
index dbc8ab768..a67baa8e2 100644
--- a/src/dev/x86/i8259.cc
+++ b/src/dev/x86/i8259.cc
@@ -128,8 +128,9 @@ X86ISA::I8259::write(PacketPtr pkt)
break;
case 0x1:
DPRINTF(I8259, "Received initialization command word 2.\n");
+ vectorOffset = val & ~mask(3);
DPRINTF(I8259, "Responsible for vectors %#x-%#x.\n",
- val & ~mask(3), val | mask(3));
+ vectorOffset, vectorOffset | mask(3));
if (cascadeMode) {
initControlWord++;
} else {
diff --git a/src/dev/x86/i8259.hh b/src/dev/x86/i8259.hh
index 7804fe3b7..107cd015c 100644
--- a/src/dev/x86/i8259.hh
+++ b/src/dev/x86/i8259.hh
@@ -53,6 +53,9 @@ class I8259 : public BasicPioDevice, public IntDev
// Interrupt Mask Register
uint8_t IMR;
+ // The higher order bits of the vector to return
+ uint8_t vectorOffset;
+
bool cascadeMode;
// A bit vector of lines with slaves attached, or the slave id, depending
// on if this is a master or slave PIC.
@@ -77,7 +80,7 @@ class I8259 : public BasicPioDevice, public IntDev
I8259(Params * p) : BasicPioDevice(p), IntDev(this),
latency(p->pio_latency), output(p->output),
mode(p->mode), IRR(0), ISR(0), IMR(0),
- readIRR(true), initControlWord(0)
+ vectorOffset(0), readIRR(true), initControlWord(0)
{
pioSize = 2;
}