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authorGabe Black <gblack@eecs.umich.edu>2009-01-25 20:33:52 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-01-25 20:33:52 -0800
commitdbe28da1be7415ad5f496b983c0345c5e9714fb9 (patch)
tree767d936df1ce0b94df013585a576e05c954de838 /src/dev
parent52defeb4e76e7f426c91eb0d0e5e2222d2ab387e (diff)
downloadgem5-dbe28da1be7415ad5f496b983c0345c5e9714fb9.tar.xz
X86: Add fake devices for non-existant serial ports.
Diffstat (limited to 'src/dev')
-rw-r--r--src/dev/x86/Pc.py8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/dev/x86/Pc.py b/src/dev/x86/Pc.py
index 080844e4a..51a21c349 100644
--- a/src/dev/x86/Pc.py
+++ b/src/dev/x86/Pc.py
@@ -61,11 +61,19 @@ class Pc(Platform):
com_1.pio_addr = x86IOAddress(0x3f8)
com_1.terminal = terminal
+ # Devices to catch access to non-existant serial ports.
+ fake_com_2 = IsaFake(pio_addr=x86IOAddress(0x2f8), pio_size=8)
+ fake_com_3 = IsaFake(pio_addr=x86IOAddress(0x3e8), pio_size=8)
+ fake_com_4 = IsaFake(pio_addr=x86IOAddress(0x2e8), pio_size=8)
+
def attachIO(self, bus):
self.south_bridge.attachIO(bus)
self.i_dont_exist.pio = bus.port
self.behind_pci.pio = bus.port
self.com_1.pio = bus.port
+ self.fake_com_2.pio = bus.port
+ self.fake_com_3.pio = bus.port
+ self.fake_com_4.pio = bus.port
self.pciconfig.pio = bus.default
bus.responder_set = True
bus.responder = self.pciconfig