diff options
author | Nathan Binkert <nate@binkert.org> | 2010-04-15 16:24:12 -0700 |
---|---|---|
committer | Nathan Binkert <nate@binkert.org> | 2010-04-15 16:24:12 -0700 |
commit | e99828b06a1b694b7aca09682ae2b1be9089af88 (patch) | |
tree | e106d16b98b45695ffd993e2cd6684919723dc66 /src/dev | |
parent | f7e6f19adabd0ce7e35cea8b5c3b070e2cd26c38 (diff) | |
download | gem5-e99828b06a1b694b7aca09682ae2b1be9089af88.tar.xz |
tick: rename Clock namespace to SimClock
Diffstat (limited to 'src/dev')
-rw-r--r-- | src/dev/alpha/tsunami_io.cc | 2 | ||||
-rw-r--r-- | src/dev/etherdump.cc | 4 | ||||
-rw-r--r-- | src/dev/i8254xGBe.cc | 4 | ||||
-rw-r--r-- | src/dev/i8254xGBe.hh | 2 | ||||
-rw-r--r-- | src/dev/intel_8254_timer.cc | 2 | ||||
-rw-r--r-- | src/dev/mc146818.cc | 2 | ||||
-rw-r--r-- | src/dev/mc146818.hh | 2 | ||||
-rwxr-xr-x | src/dev/mips/malta_io.cc | 2 | ||||
-rw-r--r-- | src/dev/uart8250.cc | 4 |
9 files changed, 12 insertions, 12 deletions
diff --git a/src/dev/alpha/tsunami_io.cc b/src/dev/alpha/tsunami_io.cc index 8b06f5170..c90f06b5a 100644 --- a/src/dev/alpha/tsunami_io.cc +++ b/src/dev/alpha/tsunami_io.cc @@ -80,7 +80,7 @@ TsunamiIO::TsunamiIO(const Params *p) Tick TsunamiIO::frequency() const { - return Clock::Frequency / params()->frequency; + return SimClock::Frequency / params()->frequency; } Tick diff --git a/src/dev/etherdump.cc b/src/dev/etherdump.cc index c41ce4e1f..9cb15c4e8 100644 --- a/src/dev/etherdump.cc +++ b/src/dev/etherdump.cc @@ -94,8 +94,8 @@ void EtherDump::dumpPacket(EthPacketPtr &packet) { pcap_pkthdr pkthdr; - pkthdr.seconds = curTick / Clock::Int::s; - pkthdr.microseconds = (curTick / Clock::Int::us) % ULL(1000000); + pkthdr.seconds = curTick / SimClock::Int::s; + pkthdr.microseconds = (curTick / SimClock::Int::us) % ULL(1000000); pkthdr.caplen = std::min(packet->length, maxlen); pkthdr.len = packet->length; stream->write(reinterpret_cast<char *>(&pkthdr), sizeof(pkthdr)); diff --git a/src/dev/i8254xGBe.cc b/src/dev/i8254xGBe.cc index ca7e9e67a..2a044ebbe 100644 --- a/src/dev/i8254xGBe.cc +++ b/src/dev/i8254xGBe.cc @@ -693,7 +693,7 @@ IGbE::postInterrupt(IntTypes t, bool now) regs.icr = regs.icr() | t; - Tick itr_interval = Clock::Int::ns * 256 * regs.itr.interval(); + Tick itr_interval = SimClock::Int::ns * 256 * regs.itr.interval(); DPRINTF(EthernetIntr, "EINT: postInterrupt() curTick: %d itr: %d interval: %d\n", curTick, regs.itr.interval(), itr_interval); @@ -801,7 +801,7 @@ IGbE::chkInterrupt() DPRINTF(Ethernet, "Possibly scheduling interrupt because of imr write\n"); if (!interEvent.scheduled()) { - Tick t = curTick + Clock::Int::ns * 256 * regs.itr.interval(); + Tick t = curTick + SimClock::Int::ns * 256 * regs.itr.interval(); DPRINTF(Ethernet, "Scheduling for %d\n", t); schedule(interEvent, t); } diff --git a/src/dev/i8254xGBe.hh b/src/dev/i8254xGBe.hh index f7f7d9a2a..738b1cf43 100644 --- a/src/dev/i8254xGBe.hh +++ b/src/dev/i8254xGBe.hh @@ -171,7 +171,7 @@ class IGbE : public EtherDevice */ void cpuClearInt(); - Tick intClock() { return Clock::Int::ns * 1024; } + Tick intClock() { return SimClock::Int::ns * 1024; } /** This function is used to restart the clock so it can handle things like * draining and resume in one place. */ diff --git a/src/dev/intel_8254_timer.cc b/src/dev/intel_8254_timer.cc index 770df1c76..9e507b968 100644 --- a/src/dev/intel_8254_timer.cc +++ b/src/dev/intel_8254_timer.cc @@ -255,7 +255,7 @@ Intel8254Timer::Counter::unserialize(const string &base, Checkpoint *cp, Intel8254Timer::Counter::CounterEvent::CounterEvent(Counter* c_ptr) { - interval = (Tick)(Clock::Float::s / 1193180.0); + interval = (Tick)(SimClock::Float::s / 1193180.0); counter = c_ptr; } diff --git a/src/dev/mc146818.cc b/src/dev/mc146818.cc index 2e6ed2a4b..16ed58e46 100644 --- a/src/dev/mc146818.cc +++ b/src/dev/mc146818.cc @@ -271,7 +271,7 @@ void MC146818::RTCTickEvent::process() { DPRINTF(MC146818, "RTC clock tick\n"); - parent->schedule(this, curTick + Clock::Int::s); + parent->schedule(this, curTick + SimClock::Int::s); parent->tickClock(); } diff --git a/src/dev/mc146818.hh b/src/dev/mc146818.hh index e33658903..699785199 100644 --- a/src/dev/mc146818.hh +++ b/src/dev/mc146818.hh @@ -71,7 +71,7 @@ class MC146818 : public EventManager RTCTickEvent(MC146818 * _parent) : parent(_parent) { - parent->schedule(this, curTick + Clock::Int::s); + parent->schedule(this, curTick + SimClock::Int::s); } /** Event process to occur at interrupt*/ diff --git a/src/dev/mips/malta_io.cc b/src/dev/mips/malta_io.cc index 5a738a9b4..a7c68a3bc 100755 --- a/src/dev/mips/malta_io.cc +++ b/src/dev/mips/malta_io.cc @@ -80,7 +80,7 @@ MaltaIO::MaltaIO(const Params *p) Tick MaltaIO::frequency() const { - return Clock::Frequency / params()->frequency; + return SimClock::Frequency / params()->frequency; } Tick diff --git a/src/dev/uart8250.cc b/src/dev/uart8250.cc index f131ab69f..2bbcf2683 100644 --- a/src/dev/uart8250.cc +++ b/src/dev/uart8250.cc @@ -90,7 +90,7 @@ Uart8250::IntrEvent::process() void Uart8250::IntrEvent::scheduleIntr() { - static const Tick interval = 225 * Clock::Int::ns; + static const Tick interval = 225 * SimClock::Int::ns; DPRINTF(Uart, "Scheduling IER interrupt for %#x, at cycle %lld\n", intrBit, curTick + interval); if (!scheduled()) @@ -217,7 +217,7 @@ Uart8250::write(PacketPtr pkt) if (UART_IER_THRI & IER) { DPRINTF(Uart, "IER: IER_THRI set, scheduling TX intrrupt\n"); - if (curTick - lastTxInt > 225 * Clock::Int::ns) { + if (curTick - lastTxInt > 225 * SimClock::Int::ns) { DPRINTF(Uart, "-- Interrupting Immediately... %d,%d\n", curTick, lastTxInt); txIntrEvent.process(); |