style: fix missing spaces in control statements

Result of running 'hg m5style --skip-all --fix-control -a'.

6 files changed, 38 insertions, 38 deletions

diff --git a/src/dev/alpha/tsunami_cchip.cc b/src/dev/alpha/tsunami_cchip.cc
index d67f4e3fb..b9a3eb46f 100644
--- a/src/dev/alpha/tsunami_cchip.cc
+++ b/src/dev/alpha/tsunami_cchip.cc
@@ -216,14 +216,14 @@ TsunamiCChip::write(PacketPtr pkt)
         olddir = dir[number];
         dim[number] = pkt->get<uint64_t>();
         dir[number] = dim[number] & drir;
-        for(int x = 0; x < Tsunami::Max_CPUs; x++)
+        for (int x = 0; x < Tsunami::Max_CPUs; x++)
         {
             bitvector = ULL(1) << x;
             // Figure out which bits have changed
             if ((dim[number] & bitvector) != (olddim & bitvector))
             {
                 // The bit is now set and it wasn't before (set)
-                if((dim[number] & bitvector) && (dir[number] & bitvector))
+                if ((dim[number] & bitvector) && (dir[number] & bitvector))
                 {
                     tsunami->intrctrl->post(number, TheISA::INTLEVEL_IRQ1, x);
                     DPRINTF(Tsunami, "dim write resulting in posting dir"
@@ -278,7 +278,7 @@ TsunamiCChip::write(PacketPtr pkt)
               if (pkt->get<uint64_t>() & 0x10000000)
                   supportedWrite = true;
 
-            if(!supportedWrite)
+            if (!supportedWrite)
                   panic("TSDEV_CC_MISC write not implemented\n");
 
             break;
@@ -292,11 +292,11 @@ TsunamiCChip::write(PacketPtr pkt)
             case TSDEV_CC_DIM2:
             case TSDEV_CC_DIM3:
                 int number;
-                if(regnum == TSDEV_CC_DIM0)
+                if (regnum == TSDEV_CC_DIM0)
                     number = 0;
-                else if(regnum == TSDEV_CC_DIM1)
+                else if (regnum == TSDEV_CC_DIM1)
                     number = 1;
-                else if(regnum == TSDEV_CC_DIM2)
+                else if (regnum == TSDEV_CC_DIM2)
                     number = 2;
                 else
                     number = 3;
@@ -309,14 +309,14 @@ TsunamiCChip::write(PacketPtr pkt)
                 olddir = dir[number];
                 dim[number] = pkt->get<uint64_t>();
                 dir[number] = dim[number] & drir;
-                for(int x = 0; x < 64; x++)
+                for (int x = 0; x < 64; x++)
                 {
                     bitvector = ULL(1) << x;
                     // Figure out which bits have changed
                     if ((dim[number] & bitvector) != (olddim & bitvector))
                     {
                         // The bit is now set and it wasn't before (set)
-                        if((dim[number] & bitvector) && (dir[number] & bitvector))
+                        if ((dim[number] & bitvector) && (dir[number] & bitvector))
                         {
                           tsunami->intrctrl->post(number, TheISA::INTLEVEL_IRQ1, x);
                           DPRINTF(Tsunami, "posting dir interrupt to cpu 0\n");
@@ -471,7 +471,7 @@ TsunamiCChip::postDRIR(uint32_t interrupt)
     assert(size <= Tsunami::Max_CPUs);
     drir |= bitvector;
 
-    for(int i=0; i < size; i++) {
+    for (int i=0; i < size; i++) {
         dir[i] = dim[i] & drir;
        if (dim[i] & bitvector) {
               tsunami->intrctrl->post(i, TheISA::INTLEVEL_IRQ1, interrupt);
@@ -491,7 +491,7 @@ TsunamiCChip::clearDRIR(uint32_t interrupt)
     if (drir & bitvector)
     {
         drir &= ~bitvector;
-        for(int i=0; i < size; i++) {
+        for (int i=0; i < size; i++) {
            if (dir[i] & bitvector) {
                tsunami->intrctrl->clear(i, TheISA::INTLEVEL_IRQ1, interrupt);
                DPRINTF(Tsunami, "clearing dir interrupt to cpu %d,"
diff --git a/src/dev/arm/flash_device.cc b/src/dev/arm/flash_device.cc
index 09b096790..60c910626 100644
--- a/src/dev/arm/flash_device.cc
+++ b/src/dev/arm/flash_device.cc
@@ -98,7 +98,7 @@ FlashDevice::FlashDevice(const FlashDeviceParams* p):
      * bitwise AND with those two numbers results in an integer with all bits
      * cleared.
      */
-    if(numPlanes & planeMask)
+    if (numPlanes & planeMask)
         fatal("Number of planes is not a power of 2 in flash device.\n");
 }
 
@@ -245,7 +245,7 @@ FlashDevice::accessDevice(uint64_t address, uint32_t amount, Callback *event,
         DPRINTF(FlashDevice, "Plane %d is busy for %d ticks\n", count,
                 time[count]);
 
-        if  (time[count] != 0) {
+        if (time[count] != 0) {
 
             struct CallBackEntry cbe;
             /**
diff --git a/src/dev/arm/ufs_device.cc b/src/dev/arm/ufs_device.cc
index fbc3bd394..07d50903b 100644
--- a/src/dev/arm/ufs_device.cc
+++ b/src/dev/arm/ufs_device.cc
@@ -693,7 +693,7 @@ UFSHostDevice::UFSSCSIDevice::readFlash(uint8_t* readaddr, uint64_t offset,
                                    uint32_t size)
 {
     /** read from image, and get to memory */
-    for(int count = 0; count < (size / SectorSize); count++)
+    for (int count = 0; count < (size / SectorSize); count++)
         flashDisk->read(&(readaddr[SectorSize*count]), (offset /
                                                         SectorSize) + count);
 }
@@ -707,7 +707,7 @@ UFSHostDevice::UFSSCSIDevice::writeFlash(uint8_t* writeaddr, uint64_t offset,
                                     uint32_t size)
 {
     /** Get from fifo and write to image*/
-    for(int count = 0; count < (size / SectorSize); count++)
+    for (int count = 0; count < (size / SectorSize); count++)
         flashDisk->write(&(writeaddr[SectorSize * count]),
                          (offset / SectorSize) + count);
 }
@@ -745,7 +745,7 @@ UFSHostDevice::UFSHostDevice(const UFSHostDeviceParams* p) :
     memReadCallback = new MakeCallback<UFSHostDevice,
         &UFSHostDevice::readCallback>(this);
 
-    for(int count = 0; count < lunAvail; count++) {
+    for (int count = 0; count < lunAvail; count++) {
         UFSDevice[count] = new UFSSCSIDevice(p, count, transferDoneCallback,
                                              memReadCallback);
     }
@@ -1672,7 +1672,7 @@ UFSHostDevice::LUNSignal()
     uint8_t this_lun = 0;
 
     //while we haven't found the right lun, keep searching
-    while((this_lun < lunAvail) && !UFSDevice[this_lun]->finishedCommand())
+    while ((this_lun < lunAvail) && !UFSDevice[this_lun]->finishedCommand())
         ++this_lun;
 
     if (this_lun < lunAvail) {
@@ -1796,13 +1796,13 @@ UFSHostDevice::readDone()
         }
 
     /**done, generate interrupt if we havent got one already*/
-    if(!(UFSHCIMem.ORInterruptStatus & 0x01)) {
+    if (!(UFSHCIMem.ORInterruptStatus & 0x01)) {
         UFSHCIMem.ORInterruptStatus |= UTPTransferREQCOMPL;
         generateInterrupt();
     }
 
 
-    if(!readDoneEvent.empty()) {
+    if (!readDoneEvent.empty()) {
         readDoneEvent.pop_front();
     }
 }
@@ -1884,7 +1884,7 @@ UFSHostDevice::writeDevice(Event* additional_action, bool toDisk, Addr
     if (toDisk) {
         ++writePendingNum;
 
-        while(!writeDoneEvent.empty() && (writeDoneEvent.front().when()
+        while (!writeDoneEvent.empty() && (writeDoneEvent.front().when()
                                           < curTick()))
             writeDoneEvent.pop_front();
 
@@ -2243,7 +2243,7 @@ UFSHostDevice::readCallback()
     uint8_t this_lun = 0;
 
     //while we haven't found the right lun, keep searching
-    while((this_lun < lunAvail) && !UFSDevice[this_lun]->finishedRead())
+    while ((this_lun < lunAvail) && !UFSDevice[this_lun]->finishedRead())
         ++this_lun;
 
     DPRINTF(UFSHostDevice, "Found LUN %d messages pending for clean: %d\n",
diff --git a/src/dev/intel_8254_timer.cc b/src/dev/intel_8254_timer.cc
index 75600fb72..e83280853 100644
--- a/src/dev/intel_8254_timer.cc
+++ b/src/dev/intel_8254_timer.cc
@@ -110,7 +110,7 @@ void
 Intel8254Timer::Counter::latchCount()
 {
     // behave like a real latch
-    if(!latch_on) {
+    if (!latch_on) {
         latch_on = true;
         read_byte = LSB;
         latched_count = currentCount();
@@ -207,7 +207,7 @@ Intel8254Timer::Counter::setRW(int rw_val)
 void
 Intel8254Timer::Counter::setMode(int mode_val)
 {
-    if(mode_val != InitTc && mode_val != RateGen &&
+    if (mode_val != InitTc && mode_val != RateGen &&
        mode_val != SquareWave)
         panic("PIT mode %#x is not implemented: \n", mode_val);
 
diff --git a/src/dev/mips/malta_cchip.cc b/src/dev/mips/malta_cchip.cc
index 34f79b65b..d607acb08 100755
--- a/src/dev/mips/malta_cchip.cc
+++ b/src/dev/mips/malta_cchip.cc
@@ -207,14 +207,14 @@ MaltaCChip::write(PacketPtr pkt)
         olddir = dir[number];
         dim[number] = pkt->get<uint64_t>();
         dir[number] = dim[number] & drir;
-        for(int x = 0; x < Malta::Max_CPUs; x++)
+        for (int x = 0; x < Malta::Max_CPUs; x++)
         {
             bitvector = ULL(1) << x;
             // Figure out which bits have changed
             if ((dim[number] & bitvector) != (olddim & bitvector))
             {
                 // The bit is now set and it wasn't before (set)
-                if((dim[number] & bitvector) && (dir[number] & bitvector))
+                if ((dim[number] & bitvector) && (dir[number] & bitvector))
                 {
                     malta->intrctrl->post(number, TheISA::INTLEVEL_IRQ1, x);
                     DPRINTF(Malta, "dim write resulting in posting dir"
@@ -269,7 +269,7 @@ MaltaCChip::write(PacketPtr pkt)
               if (pkt->get<uint64_t>() & 0x10000000)
                   supportedWrite = true;
 
-            if(!supportedWrite)
+            if (!supportedWrite)
                   panic("TSDEV_CC_MISC write not implemented\n");
 
             break;
@@ -283,11 +283,11 @@ MaltaCChip::write(PacketPtr pkt)
             case TSDEV_CC_DIM2:
             case TSDEV_CC_DIM3:
                 int number;
-                if(regnum == TSDEV_CC_DIM0)
+                if (regnum == TSDEV_CC_DIM0)
                     number = 0;
-                else if(regnum == TSDEV_CC_DIM1)
+                else if (regnum == TSDEV_CC_DIM1)
                     number = 1;
-                else if(regnum == TSDEV_CC_DIM2)
+                else if (regnum == TSDEV_CC_DIM2)
                     number = 2;
                 else
                     number = 3;
@@ -300,14 +300,14 @@ MaltaCChip::write(PacketPtr pkt)
                 olddir = dir[number];
                 dim[number] = pkt->get<uint64_t>();
                 dir[number] = dim[number] & drir;
-                for(int x = 0; x < 64; x++)
+                for (int x = 0; x < 64; x++)
                 {
                     bitvector = ULL(1) << x;
                     // Figure out which bits have changed
                     if ((dim[number] & bitvector) != (olddim & bitvector))
                     {
                         // The bit is now set and it wasn't before (set)
-                        if((dim[number] & bitvector) && (dir[number] & bitvector))
+                        if ((dim[number] & bitvector) && (dir[number] & bitvector))
                         {
                           malta->intrctrl->post(number, TheISA::INTLEVEL_IRQ1, x);
                           DPRINTF(Malta, "posting dir interrupt to cpu 0\n");
@@ -476,7 +476,7 @@ MaltaCChip::postIntr(uint32_t interrupt)
     uint64_t size = sys->threadContexts.size();
     assert(size <= Malta::Max_CPUs);
 
-    for(int i=0; i < size; i++) {
+    for (int i=0; i < size; i++) {
                                         //Note: Malta does not use index, but this was added to use the pre-existing implementation
               malta->intrctrl->post(i, interrupt, 0);
               DPRINTF(Malta, "posting  interrupt to cpu %d,"
@@ -491,7 +491,7 @@ MaltaCChip::clearIntr(uint32_t interrupt)
     uint64_t size = sys->threadContexts.size();
     assert(size <= Malta::Max_CPUs);
 
-    for(int i=0; i < size; i++) {
+    for (int i=0; i < size; i++) {
                                         //Note: Malta does not use index, but this was added to use the pre-existing implementation
               malta->intrctrl->clear(i, interrupt, 0);
               DPRINTF(Malta, "clearing interrupt to cpu %d,"
diff --git a/src/dev/virtio/base.cc b/src/dev/virtio/base.cc
index ad97de99c..05c1edd62 100644
--- a/src/dev/virtio/base.cc
+++ b/src/dev/virtio/base.cc
@@ -93,7 +93,7 @@ VirtDescriptor::updateChain()
     VirtDescriptor *desc(this);
     do {
         desc->update();
-    } while((desc = desc->next()) != NULL && desc != this);
+    } while ((desc = desc->next()) != NULL && desc != this);
 
     if (desc == this)
         panic("Loop in descriptor chain!\n");
@@ -125,7 +125,7 @@ VirtDescriptor::dumpChain() const
     const VirtDescriptor *desc(this);
     do {
         desc->dump();
-    } while((desc = desc->next()) != NULL);
+    } while ((desc = desc->next()) != NULL);
 }
 
 VirtDescriptor *
@@ -177,7 +177,7 @@ VirtDescriptor::chainRead(size_t offset, uint8_t *dst, size_t size) const
         } else {
             offset -= desc->size();
         }
-    } while((desc = desc->next()) != NULL && desc->isIncoming() && size > 0);
+    } while ((desc = desc->next()) != NULL && desc->isIncoming() && size > 0);
 
     if (size != 0) {
         panic("Failed to read %i bytes from chain of %i bytes @ offset %i\n",
@@ -200,7 +200,7 @@ VirtDescriptor::chainWrite(size_t offset, const uint8_t *src, size_t size)
         } else {
             offset -= desc->size();
         }
-    } while((desc = desc->next()) != NULL && size > 0);
+    } while ((desc = desc->next()) != NULL && size > 0);
 
     if (size != 0) {
         panic("Failed to write %i bytes into chain of %i bytes @ offset %i\n",
@@ -215,7 +215,7 @@ VirtDescriptor::chainSize() const
     const VirtDescriptor *desc(this);
     do {
         size += desc->size();
-    } while((desc = desc->next()) != NULL);
+    } while ((desc = desc->next()) != NULL);
 
     return size;
 }
@@ -315,7 +315,7 @@ VirtQueue::onNotify()
 
     // Consume all pending descriptors from the input queue.
     VirtDescriptor *d;
-    while((d = consumeDescriptor()) != NULL)
+    while ((d = consumeDescriptor()) != NULL)
         onNotifyDescriptor(d);
 }