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| author | Ali Saidi <saidi@eecs.umich.edu> | 2007-05-09 22:34:54 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-05-09 22:34:54 -0400 |
| commit | 9dfbea68a204ca93ef9d20a13dd2fe7288121c75 (patch) | |
| tree | 50c8b08d03f16b0450b2da4247babf9dae7a7e20 /src/dev | |
| parent | ff55888575af9e661697882736741ea6d4613303 (diff) | |
| download | gem5-9dfbea68a204ca93ef9d20a13dd2fe7288121c75.tar.xz | |
update for new reschedule semantics
--HG--
extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
Diffstat (limited to 'src/dev')
| -rw-r--r-- | src/dev/i8254xGBe.cc | 16 | ||||
| -rw-r--r-- | src/dev/io_device.cc | 5 | ||||
| -rw-r--r-- | src/dev/ns_gige.cc | 5 | ||||
| -rw-r--r-- | src/dev/sinic.cc | 5 |
4 files changed, 7 insertions, 24 deletions
diff --git a/src/dev/i8254xGBe.cc b/src/dev/i8254xGBe.cc index e54249dee..680e31656 100644 --- a/src/dev/i8254xGBe.cc +++ b/src/dev/i8254xGBe.cc @@ -727,12 +727,8 @@ IGbE::RxDescCache::pktComplete() if (igbe->regs.rdtr.delay()) { DPRINTF(EthernetSM, "RXS: Scheduling DTR for %d\n", igbe->regs.rdtr.delay() * igbe->intClock()); - if (igbe->rdtrEvent.scheduled()) - igbe->rdtrEvent.reschedule(curTick + igbe->regs.rdtr.delay() * - igbe->intClock()); - else - igbe->rdtrEvent.schedule(curTick + igbe->regs.rdtr.delay() * - igbe->intClock()); + igbe->rdtrEvent.reschedule(curTick + igbe->regs.rdtr.delay() * + igbe->intClock(),true); } if (igbe->regs.radv.idv() && igbe->regs.rdtr.delay()) { @@ -946,12 +942,8 @@ IGbE::TxDescCache::pktComplete() DPRINTF(EthernetDesc, "Descriptor had IDE set\n"); if (igbe->regs.tidv.idv()) { DPRINTF(EthernetDesc, "setting tidv\n"); - if (igbe->tidvEvent.scheduled()) - igbe->tidvEvent.reschedule(curTick + igbe->regs.tidv.idv() * - igbe->intClock()); - else - igbe->tidvEvent.schedule(curTick + igbe->regs.tidv.idv() * - igbe->intClock()); + igbe->tidvEvent.reschedule(curTick + igbe->regs.tidv.idv() * + igbe->intClock(), true); } if (igbe->regs.tadv.idv() && igbe->regs.tidv.idv()) { diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc index 9384c4b92..d430ace72 100644 --- a/src/dev/io_device.cc +++ b/src/dev/io_device.cc @@ -111,10 +111,7 @@ DmaPort::recvTiming(PacketPtr pkt) else if (backoffTime < device->maxBackoffDelay) backoffTime <<= 1; - if (backoffEvent.scheduled()) - backoffEvent.reschedule(curTick + backoffTime); - else - backoffEvent.schedule(curTick + backoffTime); + backoffEvent.reschedule(curTick + backoffTime, true); DPRINTF(DMA, "Backoff time set to %d ticks\n", backoffTime); diff --git a/src/dev/ns_gige.cc b/src/dev/ns_gige.cc index bec1fb848..d9985f808 100644 --- a/src/dev/ns_gige.cc +++ b/src/dev/ns_gige.cc @@ -2310,10 +2310,7 @@ NSGigE::transferDone() DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n"); - if (txEvent.scheduled()) - txEvent.reschedule(curTick + cycles(1)); - else - txEvent.schedule(curTick + cycles(1)); + txEvent.reschedule(curTick + cycles(1), true); } bool diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc index 1a72652da..420761620 100644 --- a/src/dev/sinic.cc +++ b/src/dev/sinic.cc @@ -1199,10 +1199,7 @@ Device::transferDone() DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n"); - if (txEvent.scheduled()) - txEvent.reschedule(curTick + cycles(1)); - else - txEvent.schedule(curTick + cycles(1)); + txEvent.reschedule(curTick + cycles(1), true); } bool |