MEM: Introduce the master/slave port sub-classes in C++

This patch introduces the notion of a master and slave port in the C++
code, thus bringing the previous classification from the Python
classes into the corresponding simulation objects and memory objects.

The patch enables us to classify behaviours into the two bins and add
assumptions and enfore compliance, also simplifying the two
interfaces. As a starting point, isSnooping is confined to a master
port, and getAddrRanges to slave ports. More of these specilisations
are to come in later patches.

The getPort function is not getMasterPort and getSlavePort, and
returns a port reference rather than a pointer as NULL would never be
a valid return value. The default implementation of these two
functions is placed in MemObject, and calls fatal.

The one drawback with this specific patch is that it requires some
code duplication, e.g. QueuedPort becomes QueuedMasterPort and
QueuedSlavePort, and BusPort becomes BusMasterPort and BusSlavePort
(avoiding multiple inheritance). With the later introduction of the
port interfaces, moving the functionality outside the port itself, a
lot of the duplicated code will disappear again.

9 files changed, 73 insertions, 51 deletions

diff --git a/src/dev/copy_engine.cc b/src/dev/copy_engine.cc
index 7b17a86a3..809649718 100644
--- a/src/dev/copy_engine.cc
+++ b/src/dev/copy_engine.cc
@@ -110,21 +110,26 @@ CopyEngine::CopyEngineChannel::~CopyEngineChannel()
     delete [] copyBuffer;
 }
 
-Port *
-CopyEngine::getPort(const std::string &if_name, int idx)
+MasterPort &
+CopyEngine::getMasterPort(const std::string &if_name, int idx)
 {
-    if (if_name == "dma") {
-        if (idx < chan.size())
-            return chan[idx]->getPort();
+    if (if_name != "dma") {
+        // pass it along to our super class
+        return PciDev::getMasterPort(if_name, idx);
+    } else {
+        if (idx >= static_cast<int>(chan.size())) {
+            panic("CopyEngine::getMasterPort: unknown index %d\n", idx);
+        }
+
+        return chan[idx]->getMasterPort();
     }
-    return PciDev::getPort(if_name, idx);
 }
 
 
-Port *
-CopyEngine::CopyEngineChannel::getPort()
+MasterPort &
+CopyEngine::CopyEngineChannel::getMasterPort()
 {
-    return &cePort;
+    return cePort;
 }
 
 void
diff --git a/src/dev/copy_engine.hh b/src/dev/copy_engine.hh
index aa0bf0896..28fc6315c 100644
--- a/src/dev/copy_engine.hh
+++ b/src/dev/copy_engine.hh
@@ -94,7 +94,7 @@ class CopyEngine : public PciDev
       public:
         CopyEngineChannel(CopyEngine *_ce, int cid);
         virtual ~CopyEngineChannel();
-        Port *getPort();
+        MasterPort &getMasterPort();
 
         std::string name() { assert(ce); return ce->name() + csprintf("-chan%d", channelId); }
         virtual Tick read(PacketPtr pkt)
@@ -196,7 +196,8 @@ class CopyEngine : public PciDev
 
     void regStats();
 
-    virtual Port *getPort(const std::string &if_name, int idx = -1);
+    virtual MasterPort &getMasterPort(const std::string &if_name,
+                                      int idx = -1);
 
     virtual Tick read(PacketPtr pkt);
     virtual Tick write(PacketPtr pkt);
diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc
index f7b8db09d..2937c66b1 100644
--- a/src/dev/io_device.cc
+++ b/src/dev/io_device.cc
@@ -71,14 +71,13 @@ PioDevice::init()
     pioPort.sendRangeChange();
 }
 
-Port *
-PioDevice::getPort(const std::string &if_name, int idx)
+SlavePort &
+PioDevice::getSlavePort(const std::string &if_name, int idx)
 {
     if (if_name == "pio") {
-        return &pioPort;
+        return pioPort;
     }
-    panic("PioDevice %s has no port named %s\n", name(), if_name);
-    return NULL;
+    return MemObject::getSlavePort(if_name, idx);
 }
 
 unsigned int
@@ -111,7 +110,7 @@ BasicPioDevice::getAddrRanges()
 
 DmaPort::DmaPort(MemObject *dev, System *s, Tick min_backoff, Tick max_backoff,
                  bool recv_snoops)
-    : Port(dev->name() + "-dmaport", dev), device(dev), sys(s),
+    : MasterPort(dev->name() + "-dmaport", dev), device(dev), sys(s),
       masterId(s->getMasterId(dev->name())),
       pendingCount(0), actionInProgress(0), drainEvent(NULL),
       backoffTime(0), minBackoffDelay(min_backoff),
@@ -370,12 +369,12 @@ DmaDevice::~DmaDevice()
 }
 
 
-Port *
-DmaDevice::getPort(const std::string &if_name, int idx)
+MasterPort &
+DmaDevice::getMasterPort(const std::string &if_name, int idx)
 {
     if (if_name == "dma") {
-        return &dmaPort;
+        return dmaPort;
     }
-    return PioDevice::getPort(if_name, idx);
+    return PioDevice::getMasterPort(if_name, idx);
 }
 
diff --git a/src/dev/io_device.hh b/src/dev/io_device.hh
index 400263957..9bb2c3d87 100644
--- a/src/dev/io_device.hh
+++ b/src/dev/io_device.hh
@@ -69,7 +69,7 @@ class PioPort : public SimpleTimingPort
 };
 
 
-class DmaPort : public Port
+class DmaPort : public MasterPort
 {
   protected:
     struct DmaReqState : public Packet::SenderState, public FastAlloc
@@ -148,16 +148,9 @@ class DmaPort : public Port
         panic("dma port shouldn't be used for pio access.");
     }
 
-    virtual void recvRangeChange()
-    {
-        // DMA port is a master with a single slave so there is no choice and
-        // thus no need to worry about any address changes
-    }
-
     virtual void recvRetry() ;
 
-    virtual bool isSnooping()
-    { return recvSnoops; }
+    virtual bool isSnooping() const { return recvSnoops; }
 
     void queueDma(PacketPtr pkt, bool front = false);
     void sendDma();
@@ -231,7 +224,7 @@ class PioDevice : public MemObject
 
     virtual unsigned int drain(Event *de);
 
-    virtual Port *getPort(const std::string &if_name, int idx = -1);
+    virtual SlavePort &getSlavePort(const std::string &if_name, int idx = -1);
 
     friend class PioPort;
 
@@ -304,7 +297,8 @@ class DmaDevice : public PioDevice
 
     unsigned cacheBlockSize() const { return dmaPort.cacheBlockSize(); }
 
-    virtual Port *getPort(const std::string &if_name, int idx = -1);
+    virtual MasterPort &getMasterPort(const std::string &if_name,
+                                      int idx = -1);
 
     friend class DmaPort;
 };
diff --git a/src/dev/pcidev.hh b/src/dev/pcidev.hh
index 07089fd0e..435188342 100644
--- a/src/dev/pcidev.hh
+++ b/src/dev/pcidev.hh
@@ -218,12 +218,12 @@ class PciDev : public DmaDevice
 
     virtual unsigned int drain(Event *de);
 
-    virtual Port *getPort(const std::string &if_name, int idx = -1)
+    virtual SlavePort &getSlavePort(const std::string &if_name, int idx = -1)
     {
         if (if_name == "config") {
-            return &configPort;
+            return configPort;
         }
-        return DmaDevice::getPort(if_name, idx);
+        return DmaDevice::getSlavePort(if_name, idx);
     }
 
 };
diff --git a/src/dev/x86/i82094aa.cc b/src/dev/x86/i82094aa.cc
index 3d7454dfd..54824c778 100644
--- a/src/dev/x86/i82094aa.cc
+++ b/src/dev/x86/i82094aa.cc
@@ -222,8 +222,8 @@ X86ISA::I82094AA::signalInterrupt(int line)
                 apics.push_back(selected);
             }
         }
-        intPort.sendMessage(apics, message,
-                            sys->getMemoryMode() == Enums::timing);
+        intMasterPort.sendMessage(apics, message,
+                                  sys->getMemoryMode() == Enums::timing);
     }
 }
 
diff --git a/src/dev/x86/i82094aa.hh b/src/dev/x86/i82094aa.hh
index f0837cc27..d3eedea7b 100644
--- a/src/dev/x86/i82094aa.hh
+++ b/src/dev/x86/i82094aa.hh
@@ -121,11 +121,11 @@ class I82094AA : public PioDevice, public IntDev
     void writeReg(uint8_t offset, uint32_t value);
     uint32_t readReg(uint8_t offset);
 
-    Port *getPort(const std::string &if_name, int idx = -1)
+    MasterPort &getMasterPort(const std::string &if_name, int idx = -1)
     {
         if (if_name == "int_master")
-            return &intPort;
-        return PioDevice::getPort(if_name, idx);
+            return intMasterPort;
+        return PioDevice::getMasterPort(if_name, idx);
     }
 
     void signalInterrupt(int line);
diff --git a/src/dev/x86/intdev.cc b/src/dev/x86/intdev.cc
index 0d038b93d..8580ae943 100644
--- a/src/dev/x86/intdev.cc
+++ b/src/dev/x86/intdev.cc
@@ -43,8 +43,9 @@
 #include "dev/x86/intdev.hh"
 
 void
-X86ISA::IntDev::IntPort::sendMessage(ApicList apics, TriggerIntMessage message,
-                                     bool timing)
+X86ISA::IntDev::IntMasterPort::sendMessage(ApicList apics,
+                                           TriggerIntMessage message,
+                                           bool timing)
 {
     ApicList::iterator apicIt;
     for (apicIt = apics.begin(); apicIt != apics.end(); apicIt++) {
@@ -67,10 +68,9 @@ X86ISA::IntDev::IntPort::sendMessage(ApicList apics, TriggerIntMessage message,
 void
 X86ISA::IntDev::init()
 {
-    if (!intPort.isConnected()) {
+    if (!intMasterPort.isConnected()) {
         panic("Int port not connected to anything!");
     }
-    intPort.sendRangeChange();
 }
 
 X86ISA::IntSourcePin *
diff --git a/src/dev/x86/intdev.hh b/src/dev/x86/intdev.hh
index 5549df637..bbdd98b24 100644
--- a/src/dev/x86/intdev.hh
+++ b/src/dev/x86/intdev.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2008 The Regents of The University of Michigan
  * All rights reserved.
  *
@@ -51,15 +63,14 @@ typedef std::list<int> ApicList;
 class IntDev
 {
   protected:
-    class IntPort : public MessagePort
+    class IntSlavePort : public MessageSlavePort
     {
         IntDev * device;
         Tick latency;
-        Addr intAddr;
       public:
-        IntPort(const std::string &_name, MemObject * _parent,
-                IntDev *dev, Tick _latency) :
-            MessagePort(_name, _parent), device(dev), latency(_latency)
+        IntSlavePort(const std::string& _name, MemObject* _parent,
+                     IntDev* dev, Tick _latency) :
+            MessageSlavePort(_name, _parent), device(dev), latency(_latency)
         {
         }
 
@@ -72,6 +83,18 @@ class IntDev
         {
             return device->recvMessage(pkt);
         }
+    };
+
+    class IntMasterPort : public MessageMasterPort
+    {
+        IntDev* device;
+        Tick latency;
+      public:
+        IntMasterPort(const std::string& _name, MemObject* _parent,
+                      IntDev* dev, Tick _latency) :
+            MessageMasterPort(_name, _parent), device(dev), latency(_latency)
+        {
+        }
 
         Tick recvResponse(PacketPtr pkt)
         {
@@ -84,11 +107,11 @@ class IntDev
                 TriggerIntMessage message, bool timing);
     };
 
-    IntPort intPort;
+    IntMasterPort intMasterPort;
 
   public:
     IntDev(MemObject * parent, Tick latency = 0) :
-        intPort(parent->name() + ".int_master", parent, this, latency)
+        intMasterPort(parent->name() + ".int_master", parent, this, latency)
     {
     }