eventq: convert all usage of events to use the new API.

For now, there is still a single global event queue, but this is
necessary for making the steps towards a parallelized m5.

19 files changed, 135 insertions, 125 deletions

diff --git a/src/dev/alpha/tsunami_io.cc b/src/dev/alpha/tsunami_io.cc
index fa4e697cf..2aaf323a2 100644
--- a/src/dev/alpha/tsunami_io.cc
+++ b/src/dev/alpha/tsunami_io.cc
@@ -56,14 +56,15 @@ using namespace std;
 //Should this be AlphaISA?
 using namespace TheISA;
 
-TsunamiIO::TsunamiRTC::TsunamiRTC(const string &n, const TsunamiIOParams *p) :
-    MC146818(n, p->time, p->year_is_bcd, p->frequency), tsunami(p->tsunami)
+TsunamiIO::RTC::RTC(const string &n, const TsunamiIOParams *p)
+    : MC146818(p->tsunami, n, p->time, p->year_is_bcd, p->frequency),
+      tsunami(p->tsunami)
 {
 }
 
 TsunamiIO::TsunamiIO(const Params *p)
-    : BasicPioDevice(p), tsunami(p->tsunami), pitimer(p->name + "pitimer"),
-      rtc(p->name + ".rtc", p)
+    : BasicPioDevice(p), tsunami(p->tsunami),
+      pitimer(this, p->name + "pitimer"), rtc(p->name + ".rtc", p)
 {
     pioSize = 0x100;
 
diff --git a/src/dev/alpha/tsunami_io.hh b/src/dev/alpha/tsunami_io.hh
index 736f498c7..b6d63322b 100644
--- a/src/dev/alpha/tsunami_io.hh
+++ b/src/dev/alpha/tsunami_io.hh
@@ -56,11 +56,11 @@ class TsunamiIO : public BasicPioDevice
 
   protected:
 
-    class TsunamiRTC : public MC146818
+    class RTC : public MC146818
     {
       public:
-        Tsunami * tsunami;
-        TsunamiRTC(const std::string &n, const TsunamiIOParams *p);
+        Tsunami *tsunami;
+        RTC(const std::string &n, const TsunamiIOParams *p);
 
       protected:
         void handleEvent()
@@ -94,7 +94,7 @@ class TsunamiIO : public BasicPioDevice
     /** Intel 8253 Periodic Interval Timer */
     Intel8254Timer pitimer;
 
-    TsunamiRTC rtc;
+    RTC rtc;
 
     uint8_t rtcAddr;
 
diff --git a/src/dev/etherbus.cc b/src/dev/etherbus.cc
index 2316bfed9..063a594e7 100644
--- a/src/dev/etherbus.cc
+++ b/src/dev/etherbus.cc
@@ -49,7 +49,7 @@ using namespace std;
 
 EtherBus::EtherBus(const Params *p)
     : EtherObject(p), ticksPerByte(p->speed), loopback(p->loopback),
-      event(&mainEventQueue, this), sender(0), dump(p->dump)
+      event(this), sender(0), dump(p->dump)
 {
 }
 
@@ -99,7 +99,7 @@ EtherBus::send(EtherInt *sndr, EthPacketPtr &pkt)
     int delay = (int)ceil(((double)pkt->length * ticksPerByte) + 1.0);
     DPRINTF(Ethernet, "scheduling packet: delay=%d, (rate=%f)\n",
             delay, ticksPerByte);
-    event.schedule(curTick + delay);
+    schedule(event, curTick + delay);
 
     return true;
 }
diff --git a/src/dev/etherbus.hh b/src/dev/etherbus.hh
index 624ceb81a..6408f7f1f 100644
--- a/src/dev/etherbus.hh
+++ b/src/dev/etherbus.hh
@@ -59,8 +59,7 @@ class EtherBus : public EtherObject
         EtherBus *bus;
 
       public:
-        DoneEvent(EventQueue *q, EtherBus *b)
-            : Event(q), bus(b) {}
+        DoneEvent(EtherBus *b) : bus(b) {}
         virtual void process() { bus->txDone(); }
         virtual const char *description() const
             { return "ethernet bus completion"; }
diff --git a/src/dev/etherlink.cc b/src/dev/etherlink.cc
index b1266000b..f3f38fc20 100644
--- a/src/dev/etherlink.cc
+++ b/src/dev/etherlink.cc
@@ -135,7 +135,7 @@ class LinkDelayEvent : public Event
   public:
     // non-scheduling version for createForUnserialize()
     LinkDelayEvent();
-    LinkDelayEvent(EtherLink::Link *link, EthPacketPtr pkt, Tick when);
+    LinkDelayEvent(EtherLink::Link *link, EthPacketPtr pkt);
 
     void process();
 
@@ -153,7 +153,8 @@ EtherLink::Link::txDone()
 
     if (linkDelay > 0) {
         DPRINTF(Ethernet, "packet delayed: delay=%d\n", linkDelay);
-        new LinkDelayEvent(this, packet, curTick + linkDelay);
+        Event *event = new LinkDelayEvent(this, packet);
+        parent->schedule(event, curTick + linkDelay);
     } else {
         txComplete(packet);
     }
@@ -182,7 +183,7 @@ EtherLink::Link::transmit(EthPacketPtr pkt)
 
     DPRINTF(Ethernet, "scheduling packet: delay=%d, (rate=%f)\n",
             delay, ticksPerByte);
-    doneEvent.schedule(curTick + delay);
+    parent->schedule(doneEvent, curTick + delay);
 
     return true;
 }
@@ -220,23 +221,22 @@ EtherLink::Link::unserialize(const string &base, Checkpoint *cp,
     if (event_scheduled) {
         Tick event_time;
         paramIn(cp, section, base + ".event_time", event_time);
-        doneEvent.schedule(event_time);
+        parent->schedule(doneEvent, event_time);
     }
 }
 
 LinkDelayEvent::LinkDelayEvent()
-    : Event(&mainEventQueue), link(NULL)
+    : link(NULL)
 {
     setFlags(AutoSerialize);
     setFlags(AutoDelete);
 }
 
-LinkDelayEvent::LinkDelayEvent(EtherLink::Link *l, EthPacketPtr p, Tick when)
-    : Event(&mainEventQueue), link(l), packet(p)
+LinkDelayEvent::LinkDelayEvent(EtherLink::Link *l, EthPacketPtr p)
+    : link(l), packet(p)
 {
     setFlags(AutoSerialize);
     setFlags(AutoDelete);
-    schedule(when);
 }
 
 void
diff --git a/src/dev/ethertap.cc b/src/dev/ethertap.cc
index f1fd1800b..85d6370be 100644
--- a/src/dev/ethertap.cc
+++ b/src/dev/ethertap.cc
@@ -246,7 +246,7 @@ EtherTap::process(int revent)
             DPRINTF(Ethernet, "bus busy...buffer for retransmission\n");
             packetBuffer.push(packet);
             if (!txEvent.scheduled())
-                txEvent.schedule(curTick + retryTime);
+                schedule(txEvent, curTick + retryTime);
         } else if (dump) {
             dump->dump(packet);
         }
@@ -269,7 +269,7 @@ EtherTap::retransmit()
     }
 
     if (!packetBuffer.empty() && !txEvent.scheduled())
-        txEvent.schedule(curTick + retryTime);
+        schedule(txEvent, curTick + retryTime);
 }
 
 EtherInt*
diff --git a/src/dev/ethertap.hh b/src/dev/ethertap.hh
index be3d73a24..ac287cecb 100644
--- a/src/dev/ethertap.hh
+++ b/src/dev/ethertap.hh
@@ -90,8 +90,7 @@ class EtherTap : public EtherObject
         EtherTap *tap;
 
       public:
-        TxEvent(EtherTap *_tap)
-            : Event(&mainEventQueue), tap(_tap) {}
+        TxEvent(EtherTap *_tap) : tap(_tap) {}
         void process() { tap->retransmit(); }
         virtual const char *description() const
             { return "EtherTap retransmit"; }
diff --git a/src/dev/i8254xGBe.cc b/src/dev/i8254xGBe.cc
index f362a7a0a..0fbda1897 100644
--- a/src/dev/i8254xGBe.cc
+++ b/src/dev/i8254xGBe.cc
@@ -592,7 +592,7 @@ IGbE::postInterrupt(IntTypes t, bool now)
 
     if (regs.itr.interval() == 0 || now || lastInterrupt + itr_interval <= curTick) {
         if (interEvent.scheduled()) {
-            interEvent.deschedule();
+            deschedule(interEvent);
         }
         cpuPostInt();
     } else {
@@ -601,7 +601,7 @@ IGbE::postInterrupt(IntTypes t, bool now)
        DPRINTF(EthernetIntr, "EINT: Scheduling timer interrupt for tick %d\n",
                 int_time);
        if (!interEvent.scheduled()) {
-           interEvent.schedule(int_time);
+           schedule(interEvent, int_time);
        }
     }
 }
@@ -628,24 +628,24 @@ IGbE::cpuPostInt()
 
 
     if (interEvent.scheduled()) {
-        interEvent.deschedule();
+        deschedule(interEvent);
     }
 
     if (rdtrEvent.scheduled()) {
         regs.icr.rxt0(1);
-        rdtrEvent.deschedule();
+        deschedule(rdtrEvent);
     }
     if (radvEvent.scheduled()) {
         regs.icr.rxt0(1);
-        radvEvent.deschedule();
+        deschedule(radvEvent);
     }
     if (tadvEvent.scheduled()) {
         regs.icr.txdw(1);
-        tadvEvent.deschedule();
+        deschedule(tadvEvent);
     }
     if (tidvEvent.scheduled()) {
         regs.icr.txdw(1);
-        tidvEvent.deschedule();
+        deschedule(tidvEvent);
     }
 
     regs.icr.int_assert(1);
@@ -677,7 +677,7 @@ IGbE::chkInterrupt()
     if (!(regs.icr() & regs.imr)) {
         DPRINTF(Ethernet, "Mask cleaned all interrupts\n");
         if (interEvent.scheduled())
-           interEvent.deschedule();
+           deschedule(interEvent);
         if (regs.icr.int_assert())
             cpuClearInt();
     }
@@ -691,7 +691,8 @@ IGbE::chkInterrupt()
             if (!interEvent.scheduled()) {
                DPRINTF(Ethernet, "Scheduling for %d\n", curTick + Clock::Int::ns
                        * 256 * regs.itr.interval());
-               interEvent.schedule(curTick + Clock::Int::ns * 256 * regs.itr.interval());
+               schedule(interEvent,
+                   curTick + Clock::Int::ns * 256 * regs.itr.interval());
             }
         }
     }
@@ -799,16 +800,16 @@ IGbE::RxDescCache::pktComplete()
     if (igbe->regs.rdtr.delay()) {
         DPRINTF(EthernetSM, "RXS: Scheduling DTR for %d\n",
                 igbe->regs.rdtr.delay() * igbe->intClock());
-        igbe->rdtrEvent.reschedule(curTick + igbe->regs.rdtr.delay() *
-                    igbe->intClock(),true);
+        igbe->reschedule(igbe->rdtrEvent,
+            curTick + igbe->regs.rdtr.delay() * igbe->intClock(), true);
     }
 
     if (igbe->regs.radv.idv()) {
         DPRINTF(EthernetSM, "RXS: Scheduling ADV for %d\n",
                 igbe->regs.radv.idv() * igbe->intClock());
         if (!igbe->radvEvent.scheduled()) {
-            igbe->radvEvent.schedule(curTick + igbe->regs.radv.idv() *
-                    igbe->intClock());
+            igbe->schedule(igbe->radvEvent,
+                curTick + igbe->regs.radv.idv() * igbe->intClock());
         }
     }
 
@@ -1040,15 +1041,15 @@ IGbE::TxDescCache::pktComplete()
         DPRINTF(EthernetDesc, "Descriptor had IDE set\n");
         if (igbe->regs.tidv.idv()) {
             DPRINTF(EthernetDesc, "setting tidv\n");
-            igbe->tidvEvent.reschedule(curTick + igbe->regs.tidv.idv() *
-                        igbe->intClock(), true);
+            igbe->reschedule(igbe->tidvEvent,
+                curTick + igbe->regs.tidv.idv() * igbe->intClock(), true);
         }
 
         if (igbe->regs.tadv.idv() && igbe->regs.tidv.idv()) {
             DPRINTF(EthernetDesc, "setting tadv\n");
             if (!igbe->tadvEvent.scheduled()) {
-                igbe->tadvEvent.schedule(curTick + igbe->regs.tadv.idv() *
-                        igbe->intClock());
+                igbe->schedule(igbe->tadvEvent,
+                    curTick + igbe->regs.tadv.idv() * igbe->intClock());
             }
         }
     }
@@ -1126,9 +1127,9 @@ IGbE::TxDescCache::hasOutstandingEvents()
 void
 IGbE::restartClock()
 {
-    if (!tickEvent.scheduled() && (rxTick || txTick || txFifoTick) && getState() ==
-            SimObject::Running)
-        tickEvent.schedule((curTick/ticks(1)) * ticks(1) + ticks(1));
+    if (!tickEvent.scheduled() && (rxTick || txTick || txFifoTick) &&
+        getState() == SimObject::Running)
+        schedule(tickEvent, (curTick / ticks(1)) * ticks(1) + ticks(1));
 }
 
 unsigned int
@@ -1147,7 +1148,7 @@ IGbE::drain(Event *de)
     rxTick = false;
 
     if (tickEvent.scheduled())
-        tickEvent.deschedule();
+        deschedule(tickEvent);
 
     if (count)
         changeState(Draining);
@@ -1432,7 +1433,7 @@ IGbE::tick()
 
 
     if (rxTick || txTick || txFifoTick)
-        tickEvent.schedule(curTick + ticks(1));
+        schedule(tickEvent, curTick + ticks(1));
 }
 
 void
@@ -1538,19 +1539,19 @@ IGbE::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_SCALAR(inter_time);
 
     if (rdtr_time)
-        rdtrEvent.schedule(rdtr_time);
+        schedule(rdtrEvent, rdtr_time);
 
     if (radv_time)
-        radvEvent.schedule(radv_time);
+        schedule(radvEvent, radv_time);
 
     if (tidv_time)
-        tidvEvent.schedule(tidv_time);
+        schedule(tidvEvent, tidv_time);
 
     if (tadv_time)
-        tadvEvent.schedule(tadv_time);
+        schedule(tadvEvent, tadv_time);
 
     if (inter_time)
-        interEvent.schedule(inter_time);
+        schedule(interEvent, inter_time);
 
     txDescCache.unserialize(cp, csprintf("%s.TxDescCache", section));
 
diff --git a/src/dev/i8254xGBe.hh b/src/dev/i8254xGBe.hh
index 4c3896e36..618145d07 100644
--- a/src/dev/i8254xGBe.hh
+++ b/src/dev/i8254xGBe.hh
@@ -293,14 +293,14 @@ class IGbE : public EtherDevice
             wbOut = max_to_wb;
 
             assert(!wbDelayEvent.scheduled()); 
-            wbDelayEvent.schedule(igbe->wbDelay + curTick);
+            igbe->schedule(wbDelayEvent, curTick + igbe->wbDelay);
         }
             
         void writeback1()
         {
             // If we're draining delay issuing this DMA
             if (igbe->drainEvent) {
-                wbDelayEvent.schedule(igbe->wbDelay + curTick);
+                igbe->schedule(wbDelayEvent, curTick + igbe->wbDelay);
                 return;
             }
 
@@ -356,14 +356,14 @@ class IGbE : public EtherDevice
             curFetching = max_to_fetch;
 
             assert(!fetchDelayEvent.scheduled());
-            fetchDelayEvent.schedule(igbe->fetchDelay + curTick);
+            igbe->schedule(fetchDelayEvent, curTick + igbe->fetchDelay);
         }
 
         void fetchDescriptors1()
         {
             // If we're draining delay issuing this DMA
             if (igbe->drainEvent) {
-                fetchDelayEvent.schedule(igbe->fetchDelay + curTick);
+                igbe->schedule(fetchDelayEvent, curTick + igbe->fetchDelay);
                 return;
             }
 
@@ -557,9 +557,9 @@ class IGbE : public EtherDevice
             UNSERIALIZE_SCALAR(fetch_delay);
             UNSERIALIZE_SCALAR(wb_delay);
             if (fetch_delay)
-                fetchDelayEvent.schedule(fetch_delay);
+                igbe->schedule(fetchDelayEvent, fetch_delay);
             if (wb_delay)
-                wbDelayEvent.schedule(wb_delay);
+                igbe->schedule(wbDelayEvent, wb_delay);
 
 
         }
diff --git a/src/dev/ide_disk.cc b/src/dev/ide_disk.cc
index 8f9999beb..9022cf087 100644
--- a/src/dev/ide_disk.cc
+++ b/src/dev/ide_disk.cc
@@ -315,7 +315,7 @@ IdeDisk::doDmaTransfer()
               dmaState, devState);
 
     if (ctrl->dmaPending() || ctrl->getState() != SimObject::Running) {
-        dmaTransferEvent.schedule(curTick + DMA_BACKOFF_PERIOD);
+        schedule(dmaTransferEvent, curTick + DMA_BACKOFF_PERIOD);
         return;
     } else
         ctrl->dmaRead(curPrdAddr, sizeof(PrdEntry_t), &dmaPrdReadEvent,
@@ -349,7 +349,7 @@ IdeDisk::doDmaDataRead()
     DPRINTF(IdeDisk, "doDmaRead, diskDelay: %d totalDiskDelay: %d\n",
             diskDelay, totalDiskDelay);
 
-    dmaReadWaitEvent.schedule(curTick + totalDiskDelay);
+    schedule(dmaReadWaitEvent, curTick + totalDiskDelay);
 }
 
 void
@@ -395,7 +395,7 @@ IdeDisk::doDmaRead()
 
     }
     if (ctrl->dmaPending() || ctrl->getState() != SimObject::Running) {
-        dmaReadWaitEvent.schedule(curTick + DMA_BACKOFF_PERIOD);
+        schedule(dmaReadWaitEvent, curTick + DMA_BACKOFF_PERIOD);
         return;
     } else if (!dmaReadCG->done()) {
         assert(dmaReadCG->complete() < MAX_DMA_SIZE);
@@ -457,7 +457,7 @@ IdeDisk::doDmaDataWrite()
         cmdBytesLeft -= SectorSize;
     }
 
-    dmaWriteWaitEvent.schedule(curTick + totalDiskDelay);
+    schedule(dmaWriteWaitEvent, curTick + totalDiskDelay);
 }
 
 void
@@ -470,7 +470,7 @@ IdeDisk::doDmaWrite()
                 curPrd.getByteCount(), TheISA::PageBytes);
     }
     if (ctrl->dmaPending() || ctrl->getState() != SimObject::Running) {
-        dmaWriteWaitEvent.schedule(curTick + DMA_BACKOFF_PERIOD);
+        schedule(dmaWriteWaitEvent, curTick + DMA_BACKOFF_PERIOD);
         return;
     } else if (!dmaWriteCG->done()) {
         assert(dmaWriteCG->complete() < MAX_DMA_SIZE);
@@ -545,7 +545,7 @@ IdeDisk::startDma(const uint32_t &prdTableBase)
     dmaState = Dma_Transfer;
 
     // schedule dma transfer (doDmaTransfer)
-    dmaTransferEvent.schedule(curTick + 1);
+    schedule(dmaTransferEvent, curTick + 1);
 }
 
 void
@@ -1073,12 +1073,12 @@ IdeDisk::unserialize(Checkpoint *cp, const string &section)
 
     switch (event) {
       case None : break;
-      case Transfer : dmaTransferEvent.schedule(reschedule); break;
-      case ReadWait : dmaReadWaitEvent.schedule(reschedule); break;
-      case WriteWait : dmaWriteWaitEvent.schedule(reschedule); break;
-      case PrdRead : dmaPrdReadEvent.schedule(reschedule); break;
-      case DmaRead : dmaReadEvent.schedule(reschedule); break;
-      case DmaWrite : dmaWriteEvent.schedule(reschedule); break;
+      case Transfer : schedule(dmaTransferEvent, reschedule); break;
+      case ReadWait : schedule(dmaReadWaitEvent, reschedule); break;
+      case WriteWait : schedule(dmaWriteWaitEvent, reschedule); break;
+      case PrdRead : schedule(dmaPrdReadEvent, reschedule); break;
+      case DmaRead : schedule(dmaReadEvent, reschedule); break;
+      case DmaWrite : schedule(dmaWriteEvent, reschedule); break;
     }
 
     // Unserialize device registers
diff --git a/src/dev/intel_8254_timer.cc b/src/dev/intel_8254_timer.cc
index 802dd44f5..27f55fd92 100644
--- a/src/dev/intel_8254_timer.cc
+++ b/src/dev/intel_8254_timer.cc
@@ -35,9 +35,11 @@
 
 using namespace std;
 
-Intel8254Timer::Intel8254Timer(const string &name)
-    : _name(name), counter0(name + ".counter0"), counter1(name + ".counter1"),
-      counter2(name + ".counter2")
+Intel8254Timer::Intel8254Timer(EventManager *em, const string &name)
+    : EventManager(em), _name(name),
+      counter0(this, name + ".counter0"),
+      counter1(this, name + ".counter1"),
+      counter2(this, name + ".counter2")
 {
     counter[0] = &counter0;
     counter[1] = &counter0;
@@ -80,10 +82,10 @@ Intel8254Timer::unserialize(const string &base, Checkpoint *cp,
     counter2.unserialize(base + ".counter2", cp, section);
 }
 
-Intel8254Timer::Counter::Counter(const string &name)
+Intel8254Timer::Counter::Counter(Intel8254Timer *p, const string &name)
     : _name(name), event(this), count(0), latched_count(0), period(0),
       mode(0), output_high(false), latch_on(false), read_byte(LSB),
-      write_byte(LSB)
+      write_byte(LSB), parent(p)
 {
 
 }
@@ -140,7 +142,7 @@ Intel8254Timer::Counter::write(const uint8_t data)
         count = (count & 0xFF00) | data;
 
         if (event.scheduled())
-          event.deschedule();
+            parent->deschedule(event);
         output_high = false;
         write_byte = MSB;
         break;
@@ -226,11 +228,10 @@ Intel8254Timer::Counter::unserialize(const string &base, Checkpoint *cp,
     Tick event_tick;
     paramIn(cp, section, base + ".event_tick", event_tick);
     if (event_tick)
-        event.schedule(event_tick);
+        parent->schedule(event, event_tick);
 }
 
 Intel8254Timer::Counter::CounterEvent::CounterEvent(Counter* c_ptr)
-    : Event(&mainEventQueue)
 {
     interval = (Tick)(Clock::Float::s / 1193180.0);
     counter = c_ptr;
@@ -260,7 +261,7 @@ Intel8254Timer::Counter::CounterEvent::setTo(int clocks)
         panic("Timer can't be set to go off instantly.\n");
     DPRINTF(Intel8254Timer, "Timer set to curTick + %d\n",
             clocks * interval);
-    schedule(curTick + clocks * interval);
+    counter->parent->schedule(this, curTick + clocks * interval);
 }
 
 const char *
diff --git a/src/dev/intel_8254_timer.hh b/src/dev/intel_8254_timer.hh
index 23596a687..439432aed 100644
--- a/src/dev/intel_8254_timer.hh
+++ b/src/dev/intel_8254_timer.hh
@@ -33,16 +33,16 @@
 #ifndef __DEV_8254_HH__
 #define __DEV_8254_HH__
 
+#include <string>
+#include <iostream>
+
 #include "base/bitunion.hh"
 #include "sim/eventq.hh"
 #include "sim/host.hh"
 #include "sim/serialize.hh"
 
-#include <string>
-#include <iostream>
-
 /** Programmable Interval Timer (Intel 8254) */
-class Intel8254Timer
+class Intel8254Timer : public EventManager
 {
     BitUnion8(CtrlReg)
         Bitfield<7, 6> sel;
@@ -129,8 +129,11 @@ class Intel8254Timer
         /** Determine which byte of a 16-bit count value to read/write */
         uint8_t read_byte, write_byte;
 
+        /** Pointer to container */
+        Intel8254Timer *parent;
+
       public:
-        Counter(const std::string &name);
+        Counter(Intel8254Timer *p, const std::string &name);
 
         /** Latch the current count (if one is not already latched) */
         void latchCount();
@@ -183,7 +186,7 @@ class Intel8254Timer
     Counter counter1;
     Counter counter2;
 
-    Intel8254Timer(const std::string &name);
+    Intel8254Timer(EventManager *em, const std::string &name);
 
     /** Write control word */
     void writeControl(const CtrlReg data);
diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc
index 41fcec8ac..cdba171a6 100644
--- a/src/dev/io_device.cc
+++ b/src/dev/io_device.cc
@@ -117,7 +117,7 @@ DmaPort::recvTiming(PacketPtr pkt)
         else if (backoffTime < device->maxBackoffDelay)
             backoffTime <<= 1;
 
-        backoffEvent.reschedule(curTick + backoffTime, true);
+        reschedule(backoffEvent, curTick + backoffTime, true);
 
         DPRINTF(DMA, "Backoff time set to %d ticks\n", backoffTime);
 
@@ -139,7 +139,7 @@ DmaPort::recvTiming(PacketPtr pkt)
         assert(state->totBytes >= state->numBytes);
         if (state->totBytes == state->numBytes) {
             if (state->delay)
-                state->completionEvent->schedule(state->delay + curTick);
+                schedule(state->completionEvent, curTick + state->delay);
             else
                 state->completionEvent->process();
             delete state;
@@ -209,7 +209,7 @@ DmaPort::recvRetry()
     if (transmitList.size() && backoffTime && !inRetry) {
         DPRINTF(DMA, "Scheduling backoff for %d\n", curTick+backoffTime);
         if (!backoffEvent.scheduled())
-            backoffEvent.schedule(backoffTime+curTick);
+            schedule(backoffEvent, backoffTime + curTick);
     }
     DPRINTF(DMA, "TransmitList: %d, backoffTime: %d inRetry: %d es: %d\n",
             transmitList.size(), backoffTime, inRetry,
@@ -297,7 +297,7 @@ DmaPort::sendDma()
                 !backoffEvent.scheduled()) {
             DPRINTF(DMA, "-- Scheduling backoff timer for %d\n",
                     backoffTime+curTick);
-            backoffEvent.schedule(backoffTime+curTick);
+            schedule(backoffEvent, backoffTime + curTick);
         }
     } else if (state == Enums::atomic) {
         transmitList.pop_front();
@@ -317,7 +317,7 @@ DmaPort::sendDma()
 
         if (state->totBytes == state->numBytes) {
             assert(!state->completionEvent->scheduled());
-            state->completionEvent->schedule(curTick + lat + state->delay);
+            schedule(state->completionEvent, curTick + lat + state->delay);
             delete state;
             delete pkt->req;
         }
diff --git a/src/dev/mc146818.cc b/src/dev/mc146818.cc
index 984422105..e5a81ff75 100644
--- a/src/dev/mc146818.cc
+++ b/src/dev/mc146818.cc
@@ -42,9 +42,9 @@
 
 using namespace std;
 
-MC146818::MC146818(const string &n, const struct tm time,
-        bool bcd, Tick frequency)
-    : _name(n), event(this, frequency)
+MC146818::MC146818(EventManager *em, const string &n, const struct tm time,
+                   bool bcd, Tick frequency)
+    : EventManager(em), _name(n), event(this, frequency)
 {
     memset(clock_data, 0, sizeof(clock_data));
     stat_regA = RTCA_32768HZ | RTCA_1024HZ;
@@ -75,6 +75,10 @@ MC146818::MC146818(const string &n, const struct tm time,
     DPRINTFN("Real-time clock set to %s", asctime(&time));
 }
 
+MC146818::~MC146818()
+{
+}
+
 void
 MC146818::writeData(const uint8_t addr, const uint8_t data)
 {
@@ -96,7 +100,7 @@ MC146818::writeData(const uint8_t addr, const uint8_t data)
                     event.scheduleIntr();
             } else {
                 if (event.scheduled())
-                    event.deschedule();
+                    deschedule(event);
             }
             stat_regB = data;
             break;
@@ -153,27 +157,27 @@ MC146818::unserialize(const string &base, Checkpoint *cp,
     // We're not unserializing the event here, but we need to
     // rescehedule the event since curTick was moved forward by the
     // checkpoint
-    event.reschedule(curTick + event.interval);
+    reschedule(event, curTick + event.interval);
 }
 
 MC146818::RTCEvent::RTCEvent(MC146818 * _parent, Tick i)
-    : Event(&mainEventQueue), parent(_parent), interval(i)
+    : parent(_parent), interval(i)
 {
     DPRINTF(MC146818, "RTC Event Initilizing\n");
-    schedule(curTick + interval);
+    parent->schedule(this, curTick + interval);
 }
 
 void
 MC146818::RTCEvent::scheduleIntr()
 {
-  schedule(curTick + interval);
+    parent->schedule(this, curTick + interval);
 }
 
 void
 MC146818::RTCEvent::process()
 {
     DPRINTF(MC146818, "RTC Timer Interrupt\n");
-    schedule(curTick + interval);
+    parent->schedule(this, curTick + interval);
     parent->handleEvent();
 }
 
diff --git a/src/dev/mc146818.hh b/src/dev/mc146818.hh
index f91e462d9..e145ad3fd 100644
--- a/src/dev/mc146818.hh
+++ b/src/dev/mc146818.hh
@@ -37,7 +37,7 @@
 #include "sim/eventq.hh"
 
 /** Real-Time Clock (MC146818) */
-class MC146818
+class MC146818 : public EventManager
 {
   protected:
     virtual void handleEvent()
@@ -96,11 +96,9 @@ class MC146818
     uint8_t stat_regB;
 
   public:
-    virtual ~MC146818()
-    {}
-
-    MC146818(const std::string &name, const struct tm time,
+    MC146818(EventManager *em, const std::string &name, const struct tm time,
             bool bcd, Tick frequency);
+    virtual ~MC146818();
 
     /** RTC write data */
     void writeData(const uint8_t addr, const uint8_t data);
diff --git a/src/dev/ns_gige.cc b/src/dev/ns_gige.cc
index f19ca20e5..d326b103f 100644
--- a/src/dev/ns_gige.cc
+++ b/src/dev/ns_gige.cc
@@ -945,7 +945,8 @@ NSGigE::cpuIntrPost(Tick when)
 
     if (intrEvent)
         intrEvent->squash();
-    intrEvent = new IntrEvent(this, intrTick, true);
+    intrEvent = new IntrEvent(this, true);
+    schedule(intrEvent, intrTick);
 }
 
 void
@@ -1442,7 +1443,7 @@ NSGigE::rxKick()
             NsRxStateStrings[rxState]);
 
     if (clock && !rxKickEvent.scheduled())
-        rxKickEvent.schedule(rxKickTick);
+        schedule(rxKickEvent, rxKickTick);
 }
 
 void
@@ -1492,7 +1493,7 @@ NSGigE::transmit()
 
    if (!txFifo.empty() && !txEvent.scheduled()) {
        DPRINTF(Ethernet, "reschedule transmit\n");
-       txEvent.schedule(curTick + retryTime);
+       schedule(txEvent, curTick + retryTime);
    }
 }
 
@@ -1885,7 +1886,7 @@ NSGigE::txKick()
             NsTxStateStrings[txState]);
 
     if (clock && !txKickEvent.scheduled())
-        txKickEvent.schedule(txKickTick);
+        schedule(txKickEvent, txKickTick);
 }
 
 /**
@@ -1999,7 +2000,7 @@ NSGigE::transferDone()
 
     DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n");
 
-    txEvent.reschedule(curTick + ticks(1), true);
+    reschedule(txEvent, curTick + ticks(1), true);
 }
 
 bool
@@ -2400,7 +2401,7 @@ NSGigE::unserialize(Checkpoint *cp, const std::string &section)
     this->txDmaState = (DmaState) txDmaState;
     UNSERIALIZE_SCALAR(txKickTick);
     if (txKickTick)
-        txKickEvent.schedule(txKickTick);
+        schedule(txKickEvent, txKickTick);
 
     /*
      * unserialize rx state machine
@@ -2418,7 +2419,7 @@ NSGigE::unserialize(Checkpoint *cp, const std::string &section)
     this->rxDmaState = (DmaState) rxDmaState;
     UNSERIALIZE_SCALAR(rxKickTick);
     if (rxKickTick)
-        rxKickEvent.schedule(rxKickTick);
+        schedule(rxKickEvent, rxKickTick);
 
     /*
      * Unserialize EEPROM state machine
@@ -2438,7 +2439,7 @@ NSGigE::unserialize(Checkpoint *cp, const std::string &section)
     Tick transmitTick;
     UNSERIALIZE_SCALAR(transmitTick);
     if (transmitTick)
-        txEvent.schedule(curTick + transmitTick);
+        schedule(txEvent, curTick + transmitTick);
 
     /*
      * unserialize receive address filter settings
@@ -2459,7 +2460,8 @@ NSGigE::unserialize(Checkpoint *cp, const std::string &section)
     Tick intrEventTick;
     UNSERIALIZE_SCALAR(intrEventTick);
     if (intrEventTick) {
-        intrEvent = new IntrEvent(this, intrEventTick, true);
+        intrEvent = new IntrEvent(this, true);
+        schedule(intrEvent, intrEventTick);
     }
 }
 
diff --git a/src/dev/pcidev.cc b/src/dev/pcidev.cc
index 63b4a806e..e1dd7e553 100644
--- a/src/dev/pcidev.cc
+++ b/src/dev/pcidev.cc
@@ -56,8 +56,8 @@ using namespace std;
 
 PciDev::PciConfigPort::PciConfigPort(PciDev *dev, int busid, int devid,
         int funcid, Platform *p)
-    : SimpleTimingPort(dev->name() + "-pciconf"), device(dev), platform(p),
-      busId(busid), deviceId(devid), functionId(funcid)
+    : SimpleTimingPort(dev->name() + "-pciconf", dev), device(dev),
+      platform(p), busId(busid), deviceId(devid), functionId(funcid)
 {
     configAddr = platform->calcConfigAddr(busId, deviceId, functionId);
 }
diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc
index 1fa8095d3..49806d37c 100644
--- a/src/dev/sinic.cc
+++ b/src/dev/sinic.cc
@@ -695,7 +695,8 @@ Base::cpuIntrPost(Tick when)
 
     if (intrEvent)
         intrEvent->squash();
-    intrEvent = new IntrEvent(this, intrTick, true);
+    intrEvent = new IntrEvent(this, true);
+    schedule(intrEvent, intrTick);
 }
 
 void
@@ -1315,7 +1316,7 @@ Device::transferDone()
 
     DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n");
 
-    txEvent.reschedule(curTick + ticks(1), true);
+    reschedule(txEvent, curTick + ticks(1), true);
 }
 
 bool
@@ -1455,7 +1456,8 @@ Base::unserialize(Checkpoint *cp, const std::string &section)
     Tick intrEventTick;
     UNSERIALIZE_SCALAR(intrEventTick);
     if (intrEventTick) {
-        intrEvent = new IntrEvent(this, intrEventTick, true);
+        intrEvent = new IntrEvent(this, true);
+        schedule(intrEvent, intrEventTick);
     }
 }
 
@@ -1705,7 +1707,7 @@ Device::unserialize(Checkpoint *cp, const std::string &section)
     Tick transmitTick;
     UNSERIALIZE_SCALAR(transmitTick);
     if (transmitTick)
-        txEvent.schedule(curTick + transmitTick);
+        schedule(txEvent, curTick + transmitTick);
 
     pioPort->sendStatusChange(Port::RangeChange);
 
diff --git a/src/dev/uart8250.cc b/src/dev/uart8250.cc
index eefda76e5..93f71f49b 100644
--- a/src/dev/uart8250.cc
+++ b/src/dev/uart8250.cc
@@ -48,7 +48,7 @@ using namespace std;
 using namespace TheISA;
 
 Uart8250::IntrEvent::IntrEvent(Uart8250 *u, int bit)
-    : Event(&mainEventQueue), uart(u)
+    : uart(u)
 {
     DPRINTF(Uart, "UART Interrupt Event Initilizing\n");
     intrBit = bit;
@@ -93,9 +93,9 @@ Uart8250::IntrEvent::scheduleIntr()
     DPRINTF(Uart, "Scheduling IER interrupt for %#x, at cycle %lld\n", intrBit,
             curTick + interval);
     if (!scheduled())
-        schedule(curTick + interval);
+        uart->schedule(this, curTick + interval);
     else
-        reschedule(curTick + interval);
+        uart->reschedule(this, curTick + interval);
 }
 
 
@@ -231,7 +231,7 @@ Uart8250::write(PacketPtr pkt)
                 {
                     DPRINTF(Uart, "IER: IER_THRI cleared, descheduling TX intrrupt\n");
                     if (txIntrEvent.scheduled())
-                        txIntrEvent.deschedule();
+                        deschedule(txIntrEvent);
                     if (status & TX_INT)
                         platform->clearConsoleInt();
                     status &= ~TX_INT;
@@ -243,7 +243,7 @@ Uart8250::write(PacketPtr pkt)
                 } else {
                     DPRINTF(Uart, "IER: IER_RDI cleared, descheduling RX intrrupt\n");
                     if (rxIntrEvent.scheduled())
-                        rxIntrEvent.deschedule();
+                        deschedule(rxIntrEvent);
                     if (status & RX_INT)
                         platform->clearConsoleInt();
                     status &= ~RX_INT;
@@ -329,9 +329,9 @@ Uart8250::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_SCALAR(rxintrwhen);
     UNSERIALIZE_SCALAR(txintrwhen);
     if (rxintrwhen != 0)
-        rxIntrEvent.schedule(rxintrwhen);
+        schedule(rxIntrEvent, rxintrwhen);
     if (txintrwhen != 0)
-        txIntrEvent.schedule(txintrwhen);
+        schedule(txIntrEvent, txintrwhen);
 }
 
 Uart8250 *