Replace curTick global variable with accessor functions.

This step makes it easy to replace the accessor functions
(which still access a global variable) with ones that access
per-thread curTick values.

18 files changed, 97 insertions, 97 deletions

diff --git a/src/dev/alpha/backdoor.cc b/src/dev/alpha/backdoor.cc
index 660ef00c5..960832f8c 100644
--- a/src/dev/alpha/backdoor.cc
+++ b/src/dev/alpha/backdoor.cc
@@ -234,7 +234,7 @@ AlphaBackdoor::write(PacketPtr pkt)
       default:
         int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
                      sizeof(alphaAccess->cpuStack[0]);
-        inform("Launching CPU %d @ %d", cpunum, curTick);
+        inform("Launching CPU %d @ %d", cpunum, curTick());
         assert(val > 0 && "Must not access primary cpu");
         if (cpunum >= 0 && cpunum < 64)
             alphaAccess->cpuStack[cpunum] = val;
diff --git a/src/dev/arm/pl011.cc b/src/dev/arm/pl011.cc
index d8ea9409b..dd1c8863e 100644
--- a/src/dev/arm/pl011.cc
+++ b/src/dev/arm/pl011.cc
@@ -187,7 +187,7 @@ Pl011::write(PacketPtr pkt)
             DPRINTF(Uart, "TX int enabled, scheduling interruptt\n");
             rawInt.txim = 1;
             if (!intEvent.scheduled())
-                schedule(intEvent, curTick + intDelay);
+                schedule(intEvent, curTick() + intDelay);
         }
 
         break;
@@ -217,7 +217,7 @@ Pl011::write(PacketPtr pkt)
             DPRINTF(Uart, "Writing to IMSC: TX int enabled, scheduling interruptt\n");
             rawInt.txim = 1;
             if (!intEvent.scheduled())
-                schedule(intEvent, curTick + intDelay);
+                schedule(intEvent, curTick() + intDelay);
         }
 
         break;
@@ -252,7 +252,7 @@ Pl011::dataAvailable()
     DPRINTF(Uart, "Data available, scheduling interrupt\n");
 
     if (!intEvent.scheduled())
-        schedule(intEvent, curTick + intDelay);
+        schedule(intEvent, curTick() + intDelay);
 }
 
 void
diff --git a/src/dev/arm/pl111.cc b/src/dev/arm/pl111.cc
index e78d28141..e597bf272 100644
--- a/src/dev/arm/pl111.cc
+++ b/src/dev/arm/pl111.cc
@@ -355,7 +355,7 @@ Pl111::readFramebuffer()
         startAddr = lcdUpbase;
     }
     curAddr = 0;
-    startTime = curTick;
+    startTime = curTick();
     maxAddr = static_cast<Addr>(length*sizeof(uint32_t));
     dmaPendingNum =0 ;
 
@@ -388,9 +388,9 @@ Pl111::dmaDone()
     DPRINTF(PL111, " -- DMA pending number %d\n", dmaPendingNum);
 
     if (maxAddr == curAddr && !dmaPendingNum) {
-        if ((curTick - startTime) > maxFrameTime)
+        if ((curTick() - startTime) > maxFrameTime)
             warn("CLCD controller buffer underrun, took %d cycles when should"
-                 " have taken %d\n", curTick - startTime, maxFrameTime);
+                 " have taken %d\n", curTick() - startTime, maxFrameTime);
 
         // double buffering so the vnc server doesn't see a tear in the screen
         memcpy(frameBuffer, dmaBuffer, maxAddr);
@@ -400,7 +400,7 @@ Pl111::dmaDone()
         writeBMP(frameBuffer);
 
         DPRINTF(PL111, "-- schedule next dma read event at %d tick \n",
-                maxFrameTime + curTick);
+                maxFrameTime + curTick());
         schedule(readEvent, nextCycle(startTime + maxFrameTime));
     }
 
@@ -415,7 +415,7 @@ Pl111::dmaDone()
 Tick
 Pl111::nextCycle()
 {
-    Tick nextTick = curTick + clock - 1;
+    Tick nextTick = curTick() + clock - 1;
     nextTick -= nextTick%clock;
     return nextTick;
 }
@@ -427,7 +427,7 @@ Pl111::nextCycle(Tick beginTick)
     if (nextTick%clock!=0)
         nextTick = nextTick - (nextTick%clock) + clock;
 
-    assert(nextTick >= curTick);
+    assert(nextTick >= curTick());
     return nextTick;
 }
 
diff --git a/src/dev/arm/rv_ctrl.cc b/src/dev/arm/rv_ctrl.cc
index 08ac07233..c0ba4c7aa 100644
--- a/src/dev/arm/rv_ctrl.cc
+++ b/src/dev/arm/rv_ctrl.cc
@@ -62,7 +62,7 @@ RealViewCtrl::read(PacketPtr pkt)
         break;
       case Clock24:
         Tick clk;
-        clk = (Tick)(curTick / (24 * SimClock::Float::MHz));
+        clk = (Tick)(curTick() / (24 * SimClock::Float::MHz));
         pkt->set((uint32_t)(clk));
         break;
       case Flash:
diff --git a/src/dev/arm/timer_sp804.cc b/src/dev/arm/timer_sp804.cc
index f6bbfb515..04668d268 100644
--- a/src/dev/arm/timer_sp804.cc
+++ b/src/dev/arm/timer_sp804.cc
@@ -93,7 +93,7 @@ Sp804::Timer::read(PacketPtr pkt, Addr daddr)
         DPRINTF(Timer, "Event schedule for %d, clock=%d, prescale=%d\n",
                 zeroEvent.when(), clock, control.timerPrescale);
         Tick time;
-        time = zeroEvent.when() - curTick;
+        time = zeroEvent.when() - curTick();
         time = time / clock / power(16, control.timerPrescale);
         DPRINTF(Timer, "-- returning counter at %d\n", time);
         pkt->set<uint32_t>(time);
@@ -188,8 +188,8 @@ Sp804::Timer::restartCounter(uint32_t val)
         DPRINTF(Timer, "-- Event was already schedule, de-scheduling\n");
         parent->deschedule(zeroEvent);
     }
-    parent->schedule(zeroEvent, curTick + time);
-    DPRINTF(Timer, "-- Scheduling new event for: %d\n", curTick + time);
+    parent->schedule(zeroEvent, curTick() + time);
+    DPRINTF(Timer, "-- Scheduling new event for: %d\n", curTick() + time);
 }
 
 void
diff --git a/src/dev/etherbus.cc b/src/dev/etherbus.cc
index 063a594e7..b072e16f8 100644
--- a/src/dev/etherbus.cc
+++ b/src/dev/etherbus.cc
@@ -87,7 +87,7 @@ bool
 EtherBus::send(EtherInt *sndr, EthPacketPtr &pkt)
 {
     if (busy()) {
-        DPRINTF(Ethernet, "ethernet packet not sent, bus busy\n", curTick);
+        DPRINTF(Ethernet, "ethernet packet not sent, bus busy\n", curTick());
         return false;
     }
 
@@ -99,7 +99,7 @@ EtherBus::send(EtherInt *sndr, EthPacketPtr &pkt)
     int delay = (int)ceil(((double)pkt->length * ticksPerByte) + 1.0);
     DPRINTF(Ethernet, "scheduling packet: delay=%d, (rate=%f)\n",
             delay, ticksPerByte);
-    schedule(event, curTick + delay);
+    schedule(event, curTick() + delay);
 
     return true;
 }
diff --git a/src/dev/etherdump.cc b/src/dev/etherdump.cc
index 9cb15c4e8..21532bd59 100644
--- a/src/dev/etherdump.cc
+++ b/src/dev/etherdump.cc
@@ -94,8 +94,8 @@ void
 EtherDump::dumpPacket(EthPacketPtr &packet)
 {
     pcap_pkthdr pkthdr;
-    pkthdr.seconds = curTick / SimClock::Int::s;
-    pkthdr.microseconds = (curTick / SimClock::Int::us) % ULL(1000000);
+    pkthdr.seconds = curTick() / SimClock::Int::s;
+    pkthdr.microseconds = (curTick() / SimClock::Int::us) % ULL(1000000);
     pkthdr.caplen = std::min(packet->length, maxlen);
     pkthdr.len = packet->length;
     stream->write(reinterpret_cast<char *>(&pkthdr), sizeof(pkthdr));
diff --git a/src/dev/etherlink.cc b/src/dev/etherlink.cc
index f3f38fc20..9d8d8cfa8 100644
--- a/src/dev/etherlink.cc
+++ b/src/dev/etherlink.cc
@@ -154,7 +154,7 @@ EtherLink::Link::txDone()
     if (linkDelay > 0) {
         DPRINTF(Ethernet, "packet delayed: delay=%d\n", linkDelay);
         Event *event = new LinkDelayEvent(this, packet);
-        parent->schedule(event, curTick + linkDelay);
+        parent->schedule(event, curTick() + linkDelay);
     } else {
         txComplete(packet);
     }
@@ -183,7 +183,7 @@ EtherLink::Link::transmit(EthPacketPtr pkt)
 
     DPRINTF(Ethernet, "scheduling packet: delay=%d, (rate=%f)\n",
             delay, ticksPerByte);
-    parent->schedule(doneEvent, curTick + delay);
+    parent->schedule(doneEvent, curTick() + delay);
 
     return true;
 }
diff --git a/src/dev/ethertap.cc b/src/dev/ethertap.cc
index 85d6370be..76952e5c0 100644
--- a/src/dev/ethertap.cc
+++ b/src/dev/ethertap.cc
@@ -246,7 +246,7 @@ EtherTap::process(int revent)
             DPRINTF(Ethernet, "bus busy...buffer for retransmission\n");
             packetBuffer.push(packet);
             if (!txEvent.scheduled())
-                schedule(txEvent, curTick + retryTime);
+                schedule(txEvent, curTick() + retryTime);
         } else if (dump) {
             dump->dump(packet);
         }
@@ -269,7 +269,7 @@ EtherTap::retransmit()
     }
 
     if (!packetBuffer.empty() && !txEvent.scheduled())
-        schedule(txEvent, curTick + retryTime);
+        schedule(txEvent, curTick() + retryTime);
 }
 
 EtherInt*
diff --git a/src/dev/i8254xGBe.cc b/src/dev/i8254xGBe.cc
index 2a044ebbe..78a897815 100644
--- a/src/dev/i8254xGBe.cc
+++ b/src/dev/i8254xGBe.cc
@@ -695,11 +695,11 @@ IGbE::postInterrupt(IntTypes t, bool now)
 
     Tick itr_interval = SimClock::Int::ns * 256 * regs.itr.interval();
     DPRINTF(EthernetIntr,
-            "EINT: postInterrupt() curTick: %d itr: %d interval: %d\n",
-            curTick, regs.itr.interval(), itr_interval);
+            "EINT: postInterrupt() curTick(): %d itr: %d interval: %d\n",
+            curTick(), regs.itr.interval(), itr_interval);
 
     if (regs.itr.interval() == 0 || now ||
-        lastInterrupt + itr_interval <= curTick) {
+        lastInterrupt + itr_interval <= curTick()) {
         if (interEvent.scheduled()) {
             deschedule(interEvent);
         }
@@ -763,7 +763,7 @@ IGbE::cpuPostInt()
 
     intrPost();
 
-    lastInterrupt = curTick;
+    lastInterrupt = curTick();
 }
 
 void
@@ -801,7 +801,7 @@ IGbE::chkInterrupt()
             DPRINTF(Ethernet,
                     "Possibly scheduling interrupt because of imr write\n");
             if (!interEvent.scheduled()) {
-                Tick t = curTick + SimClock::Int::ns * 256 * regs.itr.interval();
+                Tick t = curTick() + SimClock::Int::ns * 256 * regs.itr.interval();
                 DPRINTF(Ethernet, "Scheduling for %d\n", t);
                 schedule(interEvent, t);
             }
@@ -888,7 +888,7 @@ IGbE::DescCache<T>::writeback(Addr aMask)
     wbOut = max_to_wb;
 
     assert(!wbDelayEvent.scheduled()); 
-    igbe->schedule(wbDelayEvent, curTick + igbe->wbDelay);
+    igbe->schedule(wbDelayEvent, curTick() + igbe->wbDelay);
     igbe->anBegin(annSmWb, "Prepare Writeback Desc");
 }
             
@@ -898,7 +898,7 @@ IGbE::DescCache<T>::writeback1()
 {
     // If we're draining delay issuing this DMA
     if (igbe->getState() != SimObject::Running) {
-        igbe->schedule(wbDelayEvent, curTick + igbe->wbDelay);
+        igbe->schedule(wbDelayEvent, curTick() + igbe->wbDelay);
         return;
     }
 
@@ -969,7 +969,7 @@ IGbE::DescCache<T>::fetchDescriptors()
     curFetching = max_to_fetch;
 
     assert(!fetchDelayEvent.scheduled());
-    igbe->schedule(fetchDelayEvent, curTick + igbe->fetchDelay);
+    igbe->schedule(fetchDelayEvent, curTick() + igbe->fetchDelay);
     igbe->anBegin(annSmFetch, "Prepare Fetch Desc");
 }
 
@@ -979,7 +979,7 @@ IGbE::DescCache<T>::fetchDescriptors1()
 {
     // If we're draining delay issuing this DMA
     if (igbe->getState() != SimObject::Running) {
-        igbe->schedule(fetchDelayEvent, curTick + igbe->fetchDelay);
+        igbe->schedule(fetchDelayEvent, curTick() + igbe->fetchDelay);
         return;
     }
 
@@ -1440,14 +1440,14 @@ IGbE::RxDescCache::pktComplete()
         if (igbe->regs.rdtr.delay()) {
             Tick delay = igbe->regs.rdtr.delay() * igbe->intClock();
             DPRINTF(EthernetSM, "RXS: Scheduling DTR for %d\n", delay);
-            igbe->reschedule(igbe->rdtrEvent, curTick + delay);
+            igbe->reschedule(igbe->rdtrEvent, curTick() + delay);
         }
 
         if (igbe->regs.radv.idv()) {
             Tick delay = igbe->regs.radv.idv() * igbe->intClock();
             DPRINTF(EthernetSM, "RXS: Scheduling ADV for %d\n", delay);
             if (!igbe->radvEvent.scheduled()) {
-                igbe->schedule(igbe->radvEvent, curTick + delay);
+                igbe->schedule(igbe->radvEvent, curTick() + delay);
             }
         }
 
@@ -1880,14 +1880,14 @@ IGbE::TxDescCache::pktComplete()
         if (igbe->regs.tidv.idv()) {
             Tick delay = igbe->regs.tidv.idv() * igbe->intClock();
             DPRINTF(EthernetDesc, "setting tidv\n");
-            igbe->reschedule(igbe->tidvEvent, curTick + delay, true);
+            igbe->reschedule(igbe->tidvEvent, curTick() + delay, true);
         }
 
         if (igbe->regs.tadv.idv() && igbe->regs.tidv.idv()) {
             Tick delay = igbe->regs.tadv.idv() * igbe->intClock();
             DPRINTF(EthernetDesc, "setting tadv\n");
             if (!igbe->tadvEvent.scheduled()) {
-                igbe->schedule(igbe->tadvEvent, curTick + delay);
+                igbe->schedule(igbe->tadvEvent, curTick() + delay);
             }
         }
     }
@@ -2039,7 +2039,7 @@ IGbE::restartClock()
 {
     if (!tickEvent.scheduled() && (rxTick || txTick || txFifoTick) &&
         getState() == SimObject::Running)
-        schedule(tickEvent, (curTick / ticks(1)) * ticks(1) + ticks(1));
+        schedule(tickEvent, (curTick() / ticks(1)) * ticks(1) + ticks(1));
 }
 
 unsigned int
@@ -2420,7 +2420,7 @@ IGbE::tick()
 
 
     if (rxTick || txTick || txFifoTick)
-        schedule(tickEvent, curTick + ticks(1));
+        schedule(tickEvent, curTick() + ticks(1));
 }
 
 void
diff --git a/src/dev/ide_disk.cc b/src/dev/ide_disk.cc
index fe93924f9..a30811d4e 100644
--- a/src/dev/ide_disk.cc
+++ b/src/dev/ide_disk.cc
@@ -323,7 +323,7 @@ IdeDisk::doDmaTransfer()
               dmaState, devState);
 
     if (ctrl->dmaPending() || ctrl->getState() != SimObject::Running) {
-        schedule(dmaTransferEvent, curTick + DMA_BACKOFF_PERIOD);
+        schedule(dmaTransferEvent, curTick() + DMA_BACKOFF_PERIOD);
         return;
     } else
         ctrl->dmaRead(curPrdAddr, sizeof(PrdEntry_t), &dmaPrdReadEvent,
@@ -357,7 +357,7 @@ IdeDisk::doDmaDataRead()
     DPRINTF(IdeDisk, "doDmaRead, diskDelay: %d totalDiskDelay: %d\n",
             diskDelay, totalDiskDelay);
 
-    schedule(dmaReadWaitEvent, curTick + totalDiskDelay);
+    schedule(dmaReadWaitEvent, curTick() + totalDiskDelay);
 }
 
 void
@@ -403,7 +403,7 @@ IdeDisk::doDmaRead()
 
     }
     if (ctrl->dmaPending() || ctrl->getState() != SimObject::Running) {
-        schedule(dmaReadWaitEvent, curTick + DMA_BACKOFF_PERIOD);
+        schedule(dmaReadWaitEvent, curTick() + DMA_BACKOFF_PERIOD);
         return;
     } else if (!dmaReadCG->done()) {
         assert(dmaReadCG->complete() < MAX_DMA_SIZE);
@@ -465,7 +465,7 @@ IdeDisk::doDmaDataWrite()
         cmdBytesLeft -= SectorSize;
     }
 
-    schedule(dmaWriteWaitEvent, curTick + totalDiskDelay);
+    schedule(dmaWriteWaitEvent, curTick() + totalDiskDelay);
 }
 
 void
@@ -478,7 +478,7 @@ IdeDisk::doDmaWrite()
                 curPrd.getByteCount(), TheISA::PageBytes);
     }
     if (ctrl->dmaPending() || ctrl->getState() != SimObject::Running) {
-        schedule(dmaWriteWaitEvent, curTick + DMA_BACKOFF_PERIOD);
+        schedule(dmaWriteWaitEvent, curTick() + DMA_BACKOFF_PERIOD);
         return;
     } else if (!dmaWriteCG->done()) {
         assert(dmaWriteCG->complete() < MAX_DMA_SIZE);
@@ -553,7 +553,7 @@ IdeDisk::startDma(const uint32_t &prdTableBase)
     dmaState = Dma_Transfer;
 
     // schedule dma transfer (doDmaTransfer)
-    schedule(dmaTransferEvent, curTick + 1);
+    schedule(dmaTransferEvent, curTick() + 1);
 }
 
 void
diff --git a/src/dev/intel_8254_timer.cc b/src/dev/intel_8254_timer.cc
index 9e507b968..aee716c01 100644
--- a/src/dev/intel_8254_timer.cc
+++ b/src/dev/intel_8254_timer.cc
@@ -281,9 +281,9 @@ Intel8254Timer::Counter::CounterEvent::setTo(int clocks)
 {
     if (clocks == 0)
         panic("Timer can't be set to go off instantly.\n");
-    DPRINTF(Intel8254Timer, "Timer set to curTick + %d\n",
+    DPRINTF(Intel8254Timer, "Timer set to curTick() + %d\n",
             clocks * interval);
-    counter->parent->schedule(this, curTick + clocks * interval);
+    counter->parent->schedule(this, curTick() + clocks * interval);
 }
 
 int
@@ -291,7 +291,7 @@ Intel8254Timer::Counter::CounterEvent::clocksLeft()
 {
     if (!scheduled())
         return -1;
-    return (when() - curTick + interval - 1) / interval;
+    return (when() - curTick() + interval - 1) / interval;
 }
 
 const char *
diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc
index 08269bf51..be97bc4ad 100644
--- a/src/dev/io_device.cc
+++ b/src/dev/io_device.cc
@@ -121,7 +121,7 @@ DmaPort::recvTiming(PacketPtr pkt)
         else if (backoffTime < maxBackoffDelay)
             backoffTime <<= 1;
 
-        reschedule(backoffEvent, curTick + backoffTime, true);
+        reschedule(backoffEvent, curTick() + backoffTime, true);
 
         DPRINTF(DMA, "Backoff time set to %d ticks\n", backoffTime);
 
@@ -144,7 +144,7 @@ DmaPort::recvTiming(PacketPtr pkt)
         if (state->totBytes == state->numBytes) {
             if (state->completionEvent) {
                 if (state->delay)
-                    schedule(state->completionEvent, curTick + state->delay);
+                    schedule(state->completionEvent, curTick() + state->delay);
                 else
                     state->completionEvent->process();
             }
@@ -212,9 +212,9 @@ DmaPort::recvRetry()
     } while (!backoffTime &&  result && transmitList.size());
 
     if (transmitList.size() && backoffTime && !inRetry) {
-        DPRINTF(DMA, "Scheduling backoff for %d\n", curTick+backoffTime);
+        DPRINTF(DMA, "Scheduling backoff for %d\n", curTick()+backoffTime);
         if (!backoffEvent.scheduled())
-            schedule(backoffEvent, backoffTime + curTick);
+            schedule(backoffEvent, backoffTime + curTick());
     }
     DPRINTF(DMA, "TransmitList: %d, backoffTime: %d inRetry: %d es: %d\n",
             transmitList.size(), backoffTime, inRetry,
@@ -299,8 +299,8 @@ DmaPort::sendDma()
         if (transmitList.size() && backoffTime && !inRetry &&
                 !backoffEvent.scheduled()) {
             DPRINTF(DMA, "-- Scheduling backoff timer for %d\n",
-                    backoffTime+curTick);
-            schedule(backoffEvent, backoffTime + curTick);
+                    backoffTime+curTick());
+            schedule(backoffEvent, backoffTime + curTick());
         }
     } else if (state == Enums::atomic) {
         transmitList.pop_front();
@@ -322,7 +322,7 @@ DmaPort::sendDma()
         if (state->totBytes == state->numBytes) {
             if (state->completionEvent) {
                 assert(!state->completionEvent->scheduled());
-                schedule(state->completionEvent, curTick + lat + state->delay);
+                schedule(state->completionEvent, curTick() + lat + state->delay);
             }
             delete state;
             delete pkt->req;
diff --git a/src/dev/mc146818.cc b/src/dev/mc146818.cc
index 16ed58e46..987b1bcd3 100644
--- a/src/dev/mc146818.cc
+++ b/src/dev/mc146818.cc
@@ -214,9 +214,9 @@ MC146818::serialize(const string &base, ostream &os)
     // save the timer tick and rtc clock tick values to correctly reschedule 
     // them during unserialize
     //
-    Tick rtcTimerInterruptTickOffset = event.when() - curTick;
+    Tick rtcTimerInterruptTickOffset = event.when() - curTick();
     SERIALIZE_SCALAR(rtcTimerInterruptTickOffset);
-    Tick rtcClockTickOffset = event.when() - curTick;
+    Tick rtcClockTickOffset = event.when() - curTick();
     SERIALIZE_SCALAR(rtcClockTickOffset);
 }
 
@@ -234,30 +234,30 @@ MC146818::unserialize(const string &base, Checkpoint *cp,
     //
     Tick rtcTimerInterruptTickOffset;
     UNSERIALIZE_SCALAR(rtcTimerInterruptTickOffset);
-    reschedule(event, curTick + rtcTimerInterruptTickOffset);
+    reschedule(event, curTick() + rtcTimerInterruptTickOffset);
     Tick rtcClockTickOffset;
     UNSERIALIZE_SCALAR(rtcClockTickOffset);
-    reschedule(tickEvent, curTick + rtcClockTickOffset);
+    reschedule(tickEvent, curTick() + rtcClockTickOffset);
 }
 
 MC146818::RTCEvent::RTCEvent(MC146818 * _parent, Tick i)
     : parent(_parent), interval(i)
 {
     DPRINTF(MC146818, "RTC Event Initilizing\n");
-    parent->schedule(this, curTick + interval);
+    parent->schedule(this, curTick() + interval);
 }
 
 void
 MC146818::RTCEvent::scheduleIntr()
 {
-    parent->schedule(this, curTick + interval);
+    parent->schedule(this, curTick() + interval);
 }
 
 void
 MC146818::RTCEvent::process()
 {
     DPRINTF(MC146818, "RTC Timer Interrupt\n");
-    parent->schedule(this, curTick + interval);
+    parent->schedule(this, curTick() + interval);
     parent->handleEvent();
 }
 
@@ -271,7 +271,7 @@ void
 MC146818::RTCTickEvent::process()
 {
     DPRINTF(MC146818, "RTC clock tick\n");
-    parent->schedule(this, curTick + SimClock::Int::s);
+    parent->schedule(this, curTick() + SimClock::Int::s);
     parent->tickClock();
 }
 
diff --git a/src/dev/mc146818.hh b/src/dev/mc146818.hh
index 699785199..576c4ab9f 100644
--- a/src/dev/mc146818.hh
+++ b/src/dev/mc146818.hh
@@ -71,7 +71,7 @@ class MC146818 : public EventManager
 
         RTCTickEvent(MC146818 * _parent) : parent(_parent)
         {
-            parent->schedule(this, curTick + SimClock::Int::s);
+            parent->schedule(this, curTick() + SimClock::Int::s);
         }
 
         /** Event process to occur at interrupt*/
diff --git a/src/dev/ns_gige.cc b/src/dev/ns_gige.cc
index 86f081ec5..794fd5355 100644
--- a/src/dev/ns_gige.cc
+++ b/src/dev/ns_gige.cc
@@ -848,7 +848,7 @@ NSGigE::devIntrPost(uint32_t interrupts)
             interrupts, regs.isr, regs.imr);
 
     if ((regs.isr & regs.imr)) {
-        Tick when = curTick;
+        Tick when = curTick();
         if ((regs.isr & regs.imr & ISR_NODELAY) == 0)
             when += intrDelay;
         postedInterrupts++;
@@ -910,7 +910,7 @@ NSGigE::devIntrChangeMask()
             regs.isr, regs.imr, regs.isr & regs.imr);
 
     if (regs.isr & regs.imr)
-        cpuIntrPost(curTick);
+        cpuIntrPost(curTick());
     else
         cpuIntrClear();
 }
@@ -927,8 +927,8 @@ NSGigE::cpuIntrPost(Tick when)
      * @todo this warning should be removed and the intrTick code should
      * be fixed.
      */
-    assert(when >= curTick);
-    assert(intrTick >= curTick || intrTick == 0);
+    assert(when >= curTick());
+    assert(intrTick >= curTick() || intrTick == 0);
     if (when > intrTick && intrTick != 0) {
         DPRINTF(EthernetIntr, "don't need to schedule event...intrTick=%d\n",
                 intrTick);
@@ -936,9 +936,9 @@ NSGigE::cpuIntrPost(Tick when)
     }
 
     intrTick = when;
-    if (intrTick < curTick) {
+    if (intrTick < curTick()) {
         debug_break();
-        intrTick = curTick;
+        intrTick = curTick();
     }
 
     DPRINTF(EthernetIntr, "going to schedule an interrupt for intrTick=%d\n",
@@ -953,7 +953,7 @@ NSGigE::cpuIntrPost(Tick when)
 void
 NSGigE::cpuInterrupt()
 {
-    assert(intrTick == curTick);
+    assert(intrTick == curTick());
 
     // Whether or not there's a pending interrupt, we don't care about
     // it anymore
@@ -1125,7 +1125,7 @@ NSGigE::rxKick()
 
   next:
     if (clock) {
-        if (rxKickTick > curTick) {
+        if (rxKickTick > curTick()) {
             DPRINTF(EthernetSM, "receive kick exiting, can't run till %d\n",
                     rxKickTick);
 
@@ -1133,7 +1133,7 @@ NSGigE::rxKick()
         }
 
         // Go to the next state machine clock tick.
-        rxKickTick = curTick + ticks(1);
+        rxKickTick = curTick() + ticks(1);
     }
 
     switch(rxDmaState) {
@@ -1494,7 +1494,7 @@ NSGigE::transmit()
 
    if (!txFifo.empty() && !txEvent.scheduled()) {
        DPRINTF(Ethernet, "reschedule transmit\n");
-       schedule(txEvent, curTick + retryTime);
+       schedule(txEvent, curTick() + retryTime);
    }
 }
 
@@ -1573,14 +1573,14 @@ NSGigE::txKick()
 
   next:
     if (clock) {
-        if (txKickTick > curTick) {
+        if (txKickTick > curTick()) {
             DPRINTF(EthernetSM, "transmit kick exiting, can't run till %d\n",
                     txKickTick);
             goto exit;
         }
 
         // Go to the next state machine clock tick.
-        txKickTick = curTick + ticks(1);
+        txKickTick = curTick() + ticks(1);
     }
 
     switch(txDmaState) {
@@ -2001,7 +2001,7 @@ NSGigE::transferDone()
 
     DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n");
 
-    reschedule(txEvent, curTick + ticks(1), true);
+    reschedule(txEvent, curTick() + ticks(1), true);
 }
 
 bool
@@ -2259,7 +2259,7 @@ NSGigE::serialize(ostream &os)
      * If there's a pending transmit, store the time so we can
      * reschedule it later
      */
-    Tick transmitTick = txEvent.scheduled() ? txEvent.when() - curTick : 0;
+    Tick transmitTick = txEvent.scheduled() ? txEvent.when() - curTick() : 0;
     SERIALIZE_SCALAR(transmitTick);
 
     /*
@@ -2440,7 +2440,7 @@ NSGigE::unserialize(Checkpoint *cp, const std::string &section)
     Tick transmitTick;
     UNSERIALIZE_SCALAR(transmitTick);
     if (transmitTick)
-        schedule(txEvent, curTick + transmitTick);
+        schedule(txEvent, curTick() + transmitTick);
 
     /*
      * unserialize receive address filter settings
diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc
index 2183d9d99..98a2426f5 100644
--- a/src/dev/sinic.cc
+++ b/src/dev/sinic.cc
@@ -618,7 +618,7 @@ Device::devIntrPost(uint32_t interrupts)
         interrupts &= ~Regs::Intr_TxLow;
 
     if (interrupts) {
-        Tick when = curTick;
+        Tick when = curTick();
         if ((interrupts & Regs::Intr_NoDelay) == 0)
             when += intrDelay;
         cpuIntrPost(when);
@@ -654,7 +654,7 @@ Device::devIntrChangeMask(uint32_t newmask)
             regs.IntrStatus, regs.IntrMask, regs.IntrStatus & regs.IntrMask);
 
     if (regs.IntrStatus & regs.IntrMask)
-        cpuIntrPost(curTick);
+        cpuIntrPost(curTick());
     else
         cpuIntrClear();
 }
@@ -671,8 +671,8 @@ Base::cpuIntrPost(Tick when)
      * @todo this warning should be removed and the intrTick code should
      * be fixed.
      */
-    assert(when >= curTick);
-    assert(intrTick >= curTick || intrTick == 0);
+    assert(when >= curTick());
+    assert(intrTick >= curTick() || intrTick == 0);
     if (!cpuIntrEnable) {
         DPRINTF(EthernetIntr, "interrupts not enabled.\n",
                 intrTick);
@@ -686,9 +686,9 @@ Base::cpuIntrPost(Tick when)
     }
 
     intrTick = when;
-    if (intrTick < curTick) {
+    if (intrTick < curTick()) {
         debug_break();
-        intrTick = curTick;
+        intrTick = curTick();
     }
 
     DPRINTF(EthernetIntr, "going to schedule an interrupt for intrTick=%d\n",
@@ -703,7 +703,7 @@ Base::cpuIntrPost(Tick when)
 void
 Base::cpuInterrupt()
 {
-    assert(intrTick == curTick);
+    assert(intrTick == curTick());
 
     // Whether or not there's a pending interrupt, we don't care about
     // it anymore
@@ -759,7 +759,7 @@ Device::changeConfig(uint32_t newconf)
         cpuIntrEnable = regs.Config & Regs::Config_IntEn;
         if (cpuIntrEnable) {
             if (regs.IntrStatus & regs.IntrMask)
-                cpuIntrPost(curTick);
+                cpuIntrPost(curTick());
         } else {
             cpuIntrClear();
         }
@@ -882,7 +882,7 @@ Device::rxKick()
     DPRINTF(EthernetSM, "rxKick: rxState=%s (rxFifo.size=%d)\n",
             RxStateStrings[rxState], rxFifo.size());
 
-    if (rxKickTick > curTick) {
+    if (rxKickTick > curTick()) {
         DPRINTF(EthernetSM, "rxKick: exiting, can't run till %d\n",
                 rxKickTick);
         return;
@@ -1196,7 +1196,7 @@ Device::txKick()
     DPRINTF(EthernetSM, "txKick: txState=%s (txFifo.size=%d)\n",
             TxStateStrings[txState], txFifo.size());
 
-    if (txKickTick > curTick) {
+    if (txKickTick > curTick()) {
         DPRINTF(EthernetSM, "txKick: exiting, can't run till %d\n",
                 txKickTick);
         return;
@@ -1317,7 +1317,7 @@ Device::transferDone()
 
     DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n");
 
-    reschedule(txEvent, curTick + ticks(1), true);
+    reschedule(txEvent, curTick() + ticks(1), true);
 }
 
 bool
@@ -1573,7 +1573,7 @@ Device::serialize(std::ostream &os)
      * If there's a pending transmit, store the time so we can
      * reschedule it later
      */
-    Tick transmitTick = txEvent.scheduled() ? txEvent.when() - curTick : 0;
+    Tick transmitTick = txEvent.scheduled() ? txEvent.when() - curTick() : 0;
     SERIALIZE_SCALAR(transmitTick);
 }
 
@@ -1708,7 +1708,7 @@ Device::unserialize(Checkpoint *cp, const std::string &section)
     Tick transmitTick;
     UNSERIALIZE_SCALAR(transmitTick);
     if (transmitTick)
-        schedule(txEvent, curTick + transmitTick);
+        schedule(txEvent, curTick() + transmitTick);
 
     pioPort->sendStatusChange(Port::RangeChange);
 
diff --git a/src/dev/uart8250.cc b/src/dev/uart8250.cc
index f8bd23311..f33a428f7 100644
--- a/src/dev/uart8250.cc
+++ b/src/dev/uart8250.cc
@@ -68,7 +68,7 @@ Uart8250::IntrEvent::process()
        DPRINTF(Uart, "UART InterEvent, interrupting\n");
        uart->platform->postConsoleInt();
        uart->status |= intrBit;
-       uart->lastTxInt = curTick;
+       uart->lastTxInt = curTick();
     }
     else
        DPRINTF(Uart, "UART InterEvent, not interrupting\n");
@@ -92,11 +92,11 @@ Uart8250::IntrEvent::scheduleIntr()
 {
     static const Tick interval = 225 * SimClock::Int::ns;
     DPRINTF(Uart, "Scheduling IER interrupt for %#x, at cycle %lld\n", intrBit,
-            curTick + interval);
+            curTick() + interval);
     if (!scheduled())
-        uart->schedule(this, curTick + interval);
+        uart->schedule(this, curTick() + interval);
     else
-        uart->reschedule(this, curTick + interval);
+        uart->reschedule(this, curTick() + interval);
 }
 
 
@@ -218,13 +218,13 @@ Uart8250::write(PacketPtr pkt)
                 if (UART_IER_THRI & IER)
                 {
                     DPRINTF(Uart, "IER: IER_THRI set, scheduling TX intrrupt\n");
-                    if (curTick - lastTxInt > 225 * SimClock::Int::ns) {
+                    if (curTick() - lastTxInt > 225 * SimClock::Int::ns) {
                         DPRINTF(Uart, "-- Interrupting Immediately... %d,%d\n",
-                                curTick, lastTxInt);
+                                curTick(), lastTxInt);
                         txIntrEvent.process();
                     } else {
                         DPRINTF(Uart, "-- Delaying interrupt... %d,%d\n",
-                                curTick, lastTxInt);
+                                curTick(), lastTxInt);
                         txIntrEvent.scheduleIntr();
                     }
                 }