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authorGabe Black <gblack@eecs.umich.edu>2006-06-12 00:49:24 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-06-12 00:49:24 -0400
commit15a8f050605919579e81b6abb98a0b596334216d (patch)
tree583b0b30f13d9874a69015d58d041ce2d7352960 /src/dev
parent60a734e1750f3c051fe92fea6f12158db6e2dcb9 (diff)
parentdf4b4f001e4db902297acf3b75480e4886e4e882 (diff)
downloadgem5-15a8f050605919579e81b6abb98a0b596334216d.tar.xz
Merge m5.eecs.umich.edu:/bk/newmem
into ewok.(none):/home/gblack/m5/newmem src/arch/sparc/regfile.hh: Hand Merge --HG-- extra : convert_revision : c47202689202069892524a7d71962082469996ee
Diffstat (limited to 'src/dev')
-rw-r--r--src/dev/alpha_access.h2
-rw-r--r--src/dev/alpha_console.cc10
-rw-r--r--src/dev/alpha_console.hh2
-rw-r--r--src/dev/baddev.cc2
-rw-r--r--src/dev/baddev.hh2
-rw-r--r--src/dev/disk_image.cc2
-rw-r--r--src/dev/disk_image.hh2
-rw-r--r--src/dev/etherbus.cc2
-rw-r--r--src/dev/etherbus.hh2
-rw-r--r--src/dev/etherdump.cc2
-rw-r--r--src/dev/etherdump.hh2
-rw-r--r--src/dev/etherint.cc2
-rw-r--r--src/dev/etherint.hh2
-rw-r--r--src/dev/etherlink.cc3
-rw-r--r--src/dev/etherlink.hh2
-rw-r--r--src/dev/etherpkt.cc2
-rw-r--r--src/dev/etherpkt.hh3
-rw-r--r--src/dev/ethertap.cc2
-rw-r--r--src/dev/ethertap.hh2
-rw-r--r--src/dev/ide_ctrl.cc7
-rw-r--r--src/dev/ide_ctrl.hh3
-rw-r--r--src/dev/ide_disk.cc3
-rw-r--r--src/dev/ide_disk.hh2
-rw-r--r--src/dev/io_device.cc108
-rw-r--r--src/dev/io_device.hh47
-rw-r--r--src/dev/isa_fake.cc6
-rw-r--r--src/dev/isa_fake.hh3
-rw-r--r--src/dev/ns_gige.cc7
-rw-r--r--src/dev/ns_gige.hh2
-rw-r--r--src/dev/ns_gige_reg.h2
-rw-r--r--src/dev/pciconfigall.cc6
-rw-r--r--src/dev/pciconfigall.hh3
-rw-r--r--src/dev/pcidev.cc4
-rw-r--r--src/dev/pcidev.hh4
-rw-r--r--src/dev/pcireg.h3
-rw-r--r--src/dev/pitreg.h2
-rw-r--r--src/dev/pktfifo.cc2
-rw-r--r--src/dev/pktfifo.hh2
-rw-r--r--src/dev/platform.cc3
-rw-r--r--src/dev/platform.hh2
-rw-r--r--src/dev/rtcreg.h4
-rw-r--r--src/dev/simconsole.cc3
-rw-r--r--src/dev/simconsole.hh3
-rw-r--r--src/dev/simple_disk.cc2
-rw-r--r--src/dev/simple_disk.hh2
-rw-r--r--src/dev/sinic.cc7
-rw-r--r--src/dev/sinic.hh2
-rw-r--r--src/dev/sinicreg.hh2
-rw-r--r--src/dev/tsunami.cc2
-rw-r--r--src/dev/tsunami.hh2
-rw-r--r--src/dev/tsunami_cchip.cc21
-rw-r--r--src/dev/tsunami_cchip.hh2
-rw-r--r--src/dev/tsunami_io.cc7
-rw-r--r--src/dev/tsunami_io.hh4
-rw-r--r--src/dev/tsunami_pchip.cc7
-rw-r--r--src/dev/tsunami_pchip.hh2
-rw-r--r--src/dev/tsunamireg.h2
-rw-r--r--src/dev/uart.cc2
-rw-r--r--src/dev/uart.hh2
-rw-r--r--src/dev/uart8250.cc4
-rw-r--r--src/dev/uart8250.hh2
61 files changed, 247 insertions, 106 deletions
diff --git a/src/dev/alpha_access.h b/src/dev/alpha_access.h
index 5a1df6f39..4adeaf84b 100644
--- a/src/dev/alpha_access.h
+++ b/src/dev/alpha_access.h
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
#ifndef __ALPHA_ACCESS_H__
diff --git a/src/dev/alpha_console.cc b/src/dev/alpha_console.cc
index 0b4bb048c..181bbf934 100644
--- a/src/dev/alpha_console.cc
+++ b/src/dev/alpha_console.cc
@@ -24,6 +24,11 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
+ * Ali Saidi
+ * Steve Reinhardt
+ * Erik Hallnor
*/
/** @file
@@ -38,7 +43,7 @@
#include "base/str.hh"
#include "base/trace.hh"
#include "cpu/base.hh"
-#include "cpu/exec_context.hh"
+#include "cpu/thread_context.hh"
#include "dev/alpha_console.hh"
#include "dev/platform.hh"
#include "dev/simconsole.hh"
@@ -98,7 +103,6 @@ AlphaConsole::read(Packet *pkt)
assert(pkt->result == Packet::Unknown);
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
- pkt->time += pioDelay;
Addr daddr = pkt->getAddr() - pioAddr;
pkt->allocate();
@@ -191,8 +195,6 @@ AlphaConsole::read(Packet *pkt)
Tick
AlphaConsole::write(Packet *pkt)
{
- pkt->time += pioDelay;
-
assert(pkt->result == Packet::Unknown);
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
Addr daddr = pkt->getAddr() - pioAddr;
diff --git a/src/dev/alpha_console.hh b/src/dev/alpha_console.hh
index 34d21e15c..b6360d40f 100644
--- a/src/dev/alpha_console.hh
+++ b/src/dev/alpha_console.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
/** @file
diff --git a/src/dev/baddev.cc b/src/dev/baddev.cc
index 66fbd8a86..e4297be19 100644
--- a/src/dev/baddev.cc
+++ b/src/dev/baddev.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
*/
/** @file
diff --git a/src/dev/baddev.hh b/src/dev/baddev.hh
index 35ae0382a..d7d778af4 100644
--- a/src/dev/baddev.hh
+++ b/src/dev/baddev.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
*/
/** @file
diff --git a/src/dev/disk_image.cc b/src/dev/disk_image.cc
index 185a8b083..f70d2ccdb 100644
--- a/src/dev/disk_image.cc
+++ b/src/dev/disk_image.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
/** @file
diff --git a/src/dev/disk_image.hh b/src/dev/disk_image.hh
index 648aa20c6..45d5af649 100644
--- a/src/dev/disk_image.hh
+++ b/src/dev/disk_image.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
/** @file
diff --git a/src/dev/etherbus.cc b/src/dev/etherbus.cc
index 906e324d3..348bb818a 100644
--- a/src/dev/etherbus.cc
+++ b/src/dev/etherbus.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
/* @file
diff --git a/src/dev/etherbus.hh b/src/dev/etherbus.hh
index 4a364abd8..2ff1d0a5e 100644
--- a/src/dev/etherbus.hh
+++ b/src/dev/etherbus.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
/* @file
diff --git a/src/dev/etherdump.cc b/src/dev/etherdump.cc
index cb5f0b70e..0c986cc21 100644
--- a/src/dev/etherdump.cc
+++ b/src/dev/etherdump.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
/* @file
diff --git a/src/dev/etherdump.hh b/src/dev/etherdump.hh
index 8bba073fe..f3080f341 100644
--- a/src/dev/etherdump.hh
+++ b/src/dev/etherdump.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
/* @file
diff --git a/src/dev/etherint.cc b/src/dev/etherint.cc
index 8fb047373..3f81591e9 100644
--- a/src/dev/etherint.cc
+++ b/src/dev/etherint.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
#include "dev/etherint.hh"
diff --git a/src/dev/etherint.hh b/src/dev/etherint.hh
index 1f641fadb..dfc224ecc 100644
--- a/src/dev/etherint.hh
+++ b/src/dev/etherint.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
/* @file
diff --git a/src/dev/etherlink.cc b/src/dev/etherlink.cc
index 5b6531c2e..cd3812270 100644
--- a/src/dev/etherlink.cc
+++ b/src/dev/etherlink.cc
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
+ * Ron Dreslinski
*/
/* @file
diff --git a/src/dev/etherlink.hh b/src/dev/etherlink.hh
index 570444e1b..bb2854810 100644
--- a/src/dev/etherlink.hh
+++ b/src/dev/etherlink.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
/* @file
diff --git a/src/dev/etherpkt.cc b/src/dev/etherpkt.cc
index 85e18e981..5c552b4bd 100644
--- a/src/dev/etherpkt.cc
+++ b/src/dev/etherpkt.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
#include <iostream>
diff --git a/src/dev/etherpkt.hh b/src/dev/etherpkt.hh
index 01741b3d5..80c7baff7 100644
--- a/src/dev/etherpkt.hh
+++ b/src/dev/etherpkt.hh
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
+ * Lisa Hsu
*/
/* @file
diff --git a/src/dev/ethertap.cc b/src/dev/ethertap.cc
index b5abb1d62..2d72383c5 100644
--- a/src/dev/ethertap.cc
+++ b/src/dev/ethertap.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
/* @file
diff --git a/src/dev/ethertap.hh b/src/dev/ethertap.hh
index 40ce6af0b..f64ed7187 100644
--- a/src/dev/ethertap.hh
+++ b/src/dev/ethertap.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
/* @file
diff --git a/src/dev/ide_ctrl.cc b/src/dev/ide_ctrl.cc
index eb03d5db8..63435e87c 100644
--- a/src/dev/ide_ctrl.cc
+++ b/src/dev/ide_ctrl.cc
@@ -24,6 +24,10 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andrew Schultz
+ * Ali Saidi
+ * Miguel Serrano
*/
#include <cstddef>
@@ -430,7 +434,6 @@ IdeController::read(Packet *pkt)
IdeRegType reg_type;
int disk;
- pkt->time += pioDelay;
pkt->allocate();
if (pkt->getSize() != 1 && pkt->getSize() != 2 && pkt->getSize() !=4)
panic("Bad IDE read size: %d\n", pkt->getSize());
@@ -518,8 +521,6 @@ IdeController::write(Packet *pkt)
int disk;
uint8_t oldVal, newVal;
- pkt->time += pioDelay;
-
parseAddr(pkt->getAddr(), offset, channel, reg_type);
if (!io_enabled) {
diff --git a/src/dev/ide_ctrl.hh b/src/dev/ide_ctrl.hh
index dda2cbb66..1d30c8b31 100644
--- a/src/dev/ide_ctrl.hh
+++ b/src/dev/ide_ctrl.hh
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andrew Schultz
+ * Miguel Serrano
*/
/** @file
diff --git a/src/dev/ide_disk.cc b/src/dev/ide_disk.cc
index 909f35c60..dc78021f8 100644
--- a/src/dev/ide_disk.cc
+++ b/src/dev/ide_disk.cc
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andrew Schultz
+ * Ali Saidi
*/
/** @file
diff --git a/src/dev/ide_disk.hh b/src/dev/ide_disk.hh
index 5379e5e73..fb0614d4d 100644
--- a/src/dev/ide_disk.hh
+++ b/src/dev/ide_disk.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andrew Schultz
*/
/** @file
diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc
index 87fdbb765..485216874 100644
--- a/src/dev/io_device.cc
+++ b/src/dev/io_device.cc
@@ -24,8 +24,12 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ * Nathan Binkert
*/
+#include "base/trace.hh"
#include "dev/io_device.hh"
#include "sim/builder.hh"
@@ -55,12 +59,13 @@ PioPort::getDeviceAddressRanges(AddrRangeList &resp, AddrRangeList &snoop)
}
-Packet *
+void
PioPort::recvRetry()
{
Packet* pkt = transmitList.front();
- transmitList.pop_front();
- return pkt;
+ if (Port::sendTiming(pkt)) {
+ transmitList.pop_front();
+ }
}
@@ -74,13 +79,14 @@ PioPort::SendEvent::process()
}
+
bool
PioPort::recvTiming(Packet *pkt)
{
- device->recvAtomic(pkt);
+ Tick latency = device->recvAtomic(pkt);
// turn packet around to go back to requester
pkt->makeTimingResponse();
- sendTiming(pkt, pkt->time - pkt->req->getTime());
+ sendTiming(pkt, latency);
return true;
}
@@ -114,18 +120,35 @@ DmaPort::DmaPort(DmaDevice *dev, Platform *p)
bool
DmaPort::recvTiming(Packet *pkt)
{
- if (pkt->senderState) {
+
+
+ if (pkt->result == Packet::Nacked) {
+ DPRINTF(DMA, "Received nacked Pkt %#x with State: %#x Addr: %#x\n",
+ pkt, pkt->senderState, pkt->getAddr());
+ pkt->reinitNacked();
+ sendDma(pkt, true);
+ } else if (pkt->senderState) {
DmaReqState *state;
+ DPRINTF(DMA, "Received response Pkt %#x with State: %#x Addr: %#x\n",
+ pkt, pkt->senderState, pkt->getAddr());
state = dynamic_cast<DmaReqState*>(pkt->senderState);
- state->completionEvent->schedule(pkt->time - pkt->req->getTime());
+ pendingCount--;
+
+ assert(pendingCount >= 0);
+ assert(state);
+
+ state->numBytes += pkt->req->getSize();
+ if (state->totBytes == state->numBytes) {
+ state->completionEvent->process();
+ delete state;
+ }
delete pkt->req;
delete pkt;
} else {
- delete pkt->req;
- delete pkt;
+ panic("Got packet without sender state... huh?\n");
}
- return Packet::Success;
+ return true;
}
DmaDevice::DmaDevice(Params *p)
@@ -133,20 +156,21 @@ DmaDevice::DmaDevice(Params *p)
{ }
void
-DmaPort::SendEvent::process()
-{
- if (port->Port::sendTiming(packet))
- return;
-
- port->transmitList.push_back(packet);
-}
-
-Packet *
DmaPort::recvRetry()
{
Packet* pkt = transmitList.front();
- transmitList.pop_front();
- return pkt;
+ bool result = true;
+ while (result && transmitList.size()) {
+ DPRINTF(DMA, "Retry on Packet %#x with senderState: %#x\n",
+ pkt, pkt->senderState);
+ result = sendTiming(pkt);
+ if (result) {
+ DPRINTF(DMA, "-- Done\n");
+ transmitList.pop_front();
+ } else {
+ DPRINTF(DMA, "-- Failed, queued\n");
+ }
+ }
}
@@ -156,27 +180,19 @@ DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
{
assert(event);
- int prevSize = 0;
+ DmaReqState *reqState = new DmaReqState(event, this, size);
for (ChunkGenerator gen(addr, size, peerBlockSize());
!gen.done(); gen.next()) {
- Request *req = new Request(false);
- req->setPaddr(gen.addr());
- req->setSize(gen.size());
- req->setTime(curTick);
+ Request *req = new Request(gen.addr(), gen.size(), 0);
Packet *pkt = new Packet(req, cmd, Packet::Broadcast);
// Increment the data pointer on a write
if (data)
- pkt->dataStatic(data + prevSize) ;
+ pkt->dataStatic(data + gen.complete());
- prevSize += gen.size();
+ pkt->senderState = reqState;
- // Set the last bit of the dma as the final packet for this dma
- // and set it's completion event.
- if (prevSize == size) {
- pkt->senderState = new DmaReqState(event, true);
- }
assert(pendingCount >= 0);
pendingCount++;
sendDma(pkt);
@@ -185,28 +201,40 @@ DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
void
-DmaPort::sendDma(Packet *pkt)
+DmaPort::sendDma(Packet *pkt, bool front)
{
// some kind of selction between access methods
// more work is going to have to be done to make
// switching actually work
/* MemState state = device->platform->system->memState;
- if (state == Timing) {
- if (!sendTiming(pkt))
- transmitList.push_back(&packet);
- } else if (state == Atomic) {*/
+ if (state == Timing) { */
+ DPRINTF(DMA, "Attempting to send Packet %#x with addr: %#x\n",
+ pkt, pkt->getAddr());
+ if (transmitList.size() || !sendTiming(pkt)) {
+ if (front)
+ transmitList.push_front(pkt);
+ else
+ transmitList.push_back(pkt);
+ DPRINTF(DMA, "-- Failed: queued\n");
+ } else {
+ DPRINTF(DMA, "-- Done\n");
+ }
+ /* } else if (state == Atomic) {
sendAtomic(pkt);
if (pkt->senderState) {
DmaReqState *state = dynamic_cast<DmaReqState*>(pkt->senderState);
- state->completionEvent->schedule(curTick + (pkt->time - pkt->req->getTime()) +1);
+ assert(state);
+ state->completionEvent->schedule(curTick + (pkt->time -
+ pkt->req->getTime()) +1);
+ delete state;
}
pendingCount--;
assert(pendingCount >= 0);
delete pkt->req;
delete pkt;
-/* } else if (state == Functional) {
+ } else if (state == Functional) {
sendFunctional(pkt);
// Is this correct???
completionEvent->schedule(pkt->req->responseTime - pkt->req->requestTime);
diff --git a/src/dev/io_device.hh b/src/dev/io_device.hh
index 74730ad92..195ca0fb7 100644
--- a/src/dev/io_device.hh
+++ b/src/dev/io_device.hh
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ * Nathan Binkert
*/
#ifndef __DEV_IO_DEVICE_HH__
@@ -105,8 +108,9 @@ class PioPort : public Port
void sendTiming(Packet *pkt, Tick time)
{ new PioPort::SendEvent(this, pkt, time); }
- /** This function pops the last element off the transmit list and sends it.*/
- virtual Packet *recvRetry();
+ /** This function is notification that the device should attempt to send a
+ * packet again. */
+ virtual void recvRetry();
public:
PioPort(PioDevice *dev, Platform *p);
@@ -117,10 +121,22 @@ class PioPort : public Port
struct DmaReqState : public Packet::SenderState
{
+ /** Event to call on the device when this transaction (all packets)
+ * complete. */
Event *completionEvent;
+
+ /** Where we came from for some sanity checking. */
+ Port *outPort;
+
+ /** Total number of bytes that this transaction involves. */
+ Addr totBytes;
+
+ /** Number of bytes that have been acked for this transaction. */
+ Addr numBytes;
+
bool final;
- DmaReqState(Event *ce, bool f)
- : completionEvent(ce), final(f)
+ DmaReqState(Event *ce, Port *p, Addr tb)
+ : completionEvent(ce), outPort(p), totBytes(tb), numBytes(0)
{}
};
@@ -146,29 +162,12 @@ class DmaPort : public Port
virtual void recvStatusChange(Status status)
{ ; }
- virtual Packet *recvRetry() ;
+ virtual void recvRetry() ;
virtual void getDeviceAddressRanges(AddrRangeList &resp, AddrRangeList &snoop)
{ resp.clear(); snoop.clear(); }
- class SendEvent : public Event
- {
- DmaPort *port;
- Packet *packet;
-
- SendEvent(PioPort *p, Packet *pkt, Tick t)
- : Event(&mainEventQueue), packet(pkt)
- { schedule(curTick + t); }
-
- virtual void process();
-
- virtual const char *description()
- { return "Future scheduled sendTiming event"; }
-
- friend class DmaPort;
- };
-
- void sendDma(Packet *pkt);
+ void sendDma(Packet *pkt, bool front = false);
public:
DmaPort(DmaDevice *dev, Platform *p);
@@ -178,8 +177,6 @@ class DmaPort : public Port
bool dmaPending() { return pendingCount > 0; }
- friend class DmaPort::SendEvent;
-
};
/**
diff --git a/src/dev/isa_fake.cc b/src/dev/isa_fake.cc
index c303ffc30..9622f015c 100644
--- a/src/dev/isa_fake.cc
+++ b/src/dev/isa_fake.cc
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Miguel Serrano
+ * Ali Saidi
*/
/** @file
@@ -54,8 +57,6 @@ IsaFake::read(Packet *pkt)
assert(pkt->result == Packet::Unknown);
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
- pkt->time += pioDelay;
-
DPRINTF(Tsunami, "read va=%#x size=%d\n", pkt->getAddr(), pkt->getSize());
switch (pkt->getSize()) {
@@ -80,7 +81,6 @@ IsaFake::read(Packet *pkt)
Tick
IsaFake::write(Packet *pkt)
{
- pkt->time += pioDelay;
DPRINTF(Tsunami, "write - va=%#x size=%d \n", pkt->getAddr(), pkt->getSize());
pkt->result = Packet::Success;
return pioDelay;
diff --git a/src/dev/isa_fake.hh b/src/dev/isa_fake.hh
index 65d44f6a5..a7a469e17 100644
--- a/src/dev/isa_fake.hh
+++ b/src/dev/isa_fake.hh
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Miguel Serrano
+ * Ali Saidi
*/
/** @file
diff --git a/src/dev/ns_gige.cc b/src/dev/ns_gige.cc
index 963675847..decffaf73 100644
--- a/src/dev/ns_gige.cc
+++ b/src/dev/ns_gige.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Lisa Hsu
*/
/** @file
@@ -35,7 +37,7 @@
#include "arch/alpha/ev5.hh"
#include "base/inet.hh"
-#include "cpu/exec_context.hh"
+#include "cpu/thread_context.hh"
#include "dev/etherlink.hh"
#include "dev/ns_gige.hh"
#include "dev/pciconfigall.hh"
@@ -492,7 +494,6 @@ NSGigE::read(Packet *pkt)
{
assert(ioEnable);
- pkt->time += pioDelay;
pkt->allocate();
//The mask is to give you only the offset into the device register file
@@ -728,8 +729,6 @@ NSGigE::write(Packet *pkt)
DPRINTF(EthernetPIO, "write da=%#x pa=%#x size=%d\n",
daddr, pkt->getAddr(), pkt->getSize());
- pkt->time += pioDelay;
-
if (daddr > LAST && daddr <= RESERVED) {
panic("Accessing reserved register");
} else if (daddr > RESERVED && daddr <= 0x3FC) {
diff --git a/src/dev/ns_gige.hh b/src/dev/ns_gige.hh
index 51520fd00..2de11c951 100644
--- a/src/dev/ns_gige.hh
+++ b/src/dev/ns_gige.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Lisa Hsu
*/
/** @file
diff --git a/src/dev/ns_gige_reg.h b/src/dev/ns_gige_reg.h
index 5f6fa2cc5..80ac5800d 100644
--- a/src/dev/ns_gige_reg.h
+++ b/src/dev/ns_gige_reg.h
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Lisa Hsu
*/
/** @file
diff --git a/src/dev/pciconfigall.cc b/src/dev/pciconfigall.cc
index 14a28e86d..785774ff4 100644
--- a/src/dev/pciconfigall.cc
+++ b/src/dev/pciconfigall.cc
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andrew Schultz
+ * Ali Saidi
*/
/* @file
@@ -99,7 +102,6 @@ PciConfigAll::read(Packet *pkt)
int func = (daddr >> 8) & 0x7;
int reg = daddr & 0xFF;
- pkt->time += pioDelay;
pkt->allocate();
DPRINTF(PciConfigAll, "read va=%#x da=%#x size=%d\n", pkt->getAddr(), daddr,
@@ -134,8 +136,6 @@ PciConfigAll::read(Packet *pkt)
Tick
PciConfigAll::write(Packet *pkt)
{
- pkt->time += pioDelay;
-
assert(pkt->result == Packet::Unknown);
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
assert(pkt->getSize() == sizeof(uint8_t) || pkt->getSize() == sizeof(uint16_t) ||
diff --git a/src/dev/pciconfigall.hh b/src/dev/pciconfigall.hh
index df4eae448..e60fd949b 100644
--- a/src/dev/pciconfigall.hh
+++ b/src/dev/pciconfigall.hh
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andrew Schultz
+ * Ali Saidi
*/
/*
diff --git a/src/dev/pcidev.cc b/src/dev/pcidev.cc
index 76392ccfe..f8db2efbc 100644
--- a/src/dev/pcidev.cc
+++ b/src/dev/pcidev.cc
@@ -24,6 +24,10 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ * Andrew Schultz
+ * Miguel Serrano
*/
/* @file
diff --git a/src/dev/pcidev.hh b/src/dev/pcidev.hh
index fc4773908..92786427b 100644
--- a/src/dev/pcidev.hh
+++ b/src/dev/pcidev.hh
@@ -24,6 +24,10 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ * Andrew Schultz
+ * Nathan Binkert
*/
/* @file
diff --git a/src/dev/pcireg.h b/src/dev/pcireg.h
index 9d2737c20..0aa4ba8ef 100644
--- a/src/dev/pcireg.h
+++ b/src/dev/pcireg.h
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
+ * Miguel Serrano
*/
/* @file
diff --git a/src/dev/pitreg.h b/src/dev/pitreg.h
index 5fe1cf03f..d42925a41 100644
--- a/src/dev/pitreg.h
+++ b/src/dev/pitreg.h
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Miguel Serrano
*/
/* @file
diff --git a/src/dev/pktfifo.cc b/src/dev/pktfifo.cc
index 922a66912..37f7ff680 100644
--- a/src/dev/pktfifo.cc
+++ b/src/dev/pktfifo.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
#include "base/misc.hh"
diff --git a/src/dev/pktfifo.hh b/src/dev/pktfifo.hh
index 336da22d8..45157ba41 100644
--- a/src/dev/pktfifo.hh
+++ b/src/dev/pktfifo.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
#ifndef __DEV_PKTFIFO_HH__
diff --git a/src/dev/platform.cc b/src/dev/platform.cc
index 9d10e0828..ed021e3b6 100644
--- a/src/dev/platform.cc
+++ b/src/dev/platform.cc
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ * Nathan Binkert
*/
#include "dev/platform.hh"
diff --git a/src/dev/platform.hh b/src/dev/platform.hh
index f149ca2fb..bfc229748 100644
--- a/src/dev/platform.hh
+++ b/src/dev/platform.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andrew Schultz
*/
/**
diff --git a/src/dev/rtcreg.h b/src/dev/rtcreg.h
index 5025a0e95..37255777b 100644
--- a/src/dev/rtcreg.h
+++ b/src/dev/rtcreg.h
@@ -24,6 +24,10 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ * Miguel Serrano
+ * Nathan Binkert
*/
#define RTC_SEC 0x00
diff --git a/src/dev/simconsole.cc b/src/dev/simconsole.cc
index e33fa18b5..77aafd9fa 100644
--- a/src/dev/simconsole.cc
+++ b/src/dev/simconsole.cc
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
+ * Ali Saidi
*/
/* @file
diff --git a/src/dev/simconsole.hh b/src/dev/simconsole.hh
index 64d1f6717..ec99c6028 100644
--- a/src/dev/simconsole.hh
+++ b/src/dev/simconsole.hh
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
+ * Ali Saidi
*/
/* @file
diff --git a/src/dev/simple_disk.cc b/src/dev/simple_disk.cc
index 9eee4668c..e29bfa726 100644
--- a/src/dev/simple_disk.cc
+++ b/src/dev/simple_disk.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
/* @file
diff --git a/src/dev/simple_disk.hh b/src/dev/simple_disk.hh
index 19967f208..9f588cb95 100644
--- a/src/dev/simple_disk.hh
+++ b/src/dev/simple_disk.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
/* @file
diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc
index 31fbc49aa..a0223733b 100644
--- a/src/dev/sinic.cc
+++ b/src/dev/sinic.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
#include <deque>
@@ -31,7 +33,7 @@
#include <string>
#include "base/inet.hh"
-#include "cpu/exec_context.hh"
+#include "cpu/thread_context.hh"
#include "cpu/intr_control.hh"
#include "dev/etherlink.hh"
#include "dev/sinic.hh"
@@ -322,7 +324,6 @@ Device::read(Packet *pkt)
Addr index = daddr >> Regs::VirtualShift;
Addr raddr = daddr & Regs::VirtualMask;
- pkt->time += pioDelay;
pkt->allocate();
if (!regValid(raddr))
@@ -410,8 +411,6 @@ Device::write(Packet *pkt)
Addr index = daddr >> Regs::VirtualShift;
Addr raddr = daddr & Regs::VirtualMask;
- pkt->time += pioDelay;
-
if (!regValid(raddr))
panic("invalid register: cpu=%d, da=%#x pa=%#x size=%d",
cpu, daddr, pkt->getAddr(), pkt->getSize());
diff --git a/src/dev/sinic.hh b/src/dev/sinic.hh
index 1bb4c77e0..f6c229039 100644
--- a/src/dev/sinic.hh
+++ b/src/dev/sinic.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
#ifndef __DEV_SINIC_HH__
diff --git a/src/dev/sinicreg.hh b/src/dev/sinicreg.hh
index d41eb5b16..de4188145 100644
--- a/src/dev/sinicreg.hh
+++ b/src/dev/sinicreg.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
*/
#ifndef __DEV_SINICREG_HH__
diff --git a/src/dev/tsunami.cc b/src/dev/tsunami.cc
index ed011531d..c9e15581d 100644
--- a/src/dev/tsunami.cc
+++ b/src/dev/tsunami.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
*/
/** @file
diff --git a/src/dev/tsunami.hh b/src/dev/tsunami.hh
index 668c82674..13fc4417c 100644
--- a/src/dev/tsunami.hh
+++ b/src/dev/tsunami.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
*/
/**
diff --git a/src/dev/tsunami_cchip.cc b/src/dev/tsunami_cchip.cc
index 146321b9f..3feb7439f 100644
--- a/src/dev/tsunami_cchip.cc
+++ b/src/dev/tsunami_cchip.cc
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ * Ron Dreslinski
*/
/** @file
@@ -40,7 +43,7 @@
#include "dev/tsunamireg.h"
#include "dev/tsunami.hh"
#include "mem/port.hh"
-#include "cpu/exec_context.hh"
+#include "cpu/thread_context.hh"
#include "cpu/intr_control.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
@@ -76,7 +79,6 @@ TsunamiCChip::read(Packet *pkt)
assert(pkt->result == Packet::Unknown);
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
- pkt->time += pioDelay;
Addr regnum = (pkt->getAddr() - pioAddr) >> 6;
Addr daddr = (pkt->getAddr() - pioAddr);
@@ -182,9 +184,6 @@ TsunamiCChip::read(Packet *pkt)
Tick
TsunamiCChip::write(Packet *pkt)
{
- pkt->time += pioDelay;
-
-
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
Addr daddr = pkt->getAddr() - pioAddr;
Addr regnum = (pkt->getAddr() - pioAddr) >> 6 ;
@@ -369,7 +368,7 @@ TsunamiCChip::write(Packet *pkt)
void
TsunamiCChip::clearIPI(uint64_t ipintr)
{
- int numcpus = tsunami->intrctrl->cpu->system->execContexts.size();
+ int numcpus = tsunami->intrctrl->cpu->system->threadContexts.size();
assert(numcpus <= Tsunami::Max_CPUs);
if (ipintr) {
@@ -395,7 +394,7 @@ TsunamiCChip::clearIPI(uint64_t ipintr)
void
TsunamiCChip::clearITI(uint64_t itintr)
{
- int numcpus = tsunami->intrctrl->cpu->system->execContexts.size();
+ int numcpus = tsunami->intrctrl->cpu->system->threadContexts.size();
assert(numcpus <= Tsunami::Max_CPUs);
if (itintr) {
@@ -415,7 +414,7 @@ TsunamiCChip::clearITI(uint64_t itintr)
void
TsunamiCChip::reqIPI(uint64_t ipreq)
{
- int numcpus = tsunami->intrctrl->cpu->system->execContexts.size();
+ int numcpus = tsunami->intrctrl->cpu->system->threadContexts.size();
assert(numcpus <= Tsunami::Max_CPUs);
if (ipreq) {
@@ -442,7 +441,7 @@ TsunamiCChip::reqIPI(uint64_t ipreq)
void
TsunamiCChip::postRTC()
{
- int size = tsunami->intrctrl->cpu->system->execContexts.size();
+ int size = tsunami->intrctrl->cpu->system->threadContexts.size();
assert(size <= Tsunami::Max_CPUs);
for (int i = 0; i < size; i++) {
@@ -460,7 +459,7 @@ void
TsunamiCChip::postDRIR(uint32_t interrupt)
{
uint64_t bitvector = ULL(1) << interrupt;
- uint64_t size = tsunami->intrctrl->cpu->system->execContexts.size();
+ uint64_t size = tsunami->intrctrl->cpu->system->threadContexts.size();
assert(size <= Tsunami::Max_CPUs);
drir |= bitvector;
@@ -478,7 +477,7 @@ void
TsunamiCChip::clearDRIR(uint32_t interrupt)
{
uint64_t bitvector = ULL(1) << interrupt;
- uint64_t size = tsunami->intrctrl->cpu->system->execContexts.size();
+ uint64_t size = tsunami->intrctrl->cpu->system->threadContexts.size();
assert(size <= Tsunami::Max_CPUs);
if (drir & bitvector)
diff --git a/src/dev/tsunami_cchip.hh b/src/dev/tsunami_cchip.hh
index 3dde0131e..ef43f621f 100644
--- a/src/dev/tsunami_cchip.hh
+++ b/src/dev/tsunami_cchip.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
*/
/** @file
diff --git a/src/dev/tsunami_io.cc b/src/dev/tsunami_io.cc
index 729a61cf7..e3da10eb5 100644
--- a/src/dev/tsunami_io.cc
+++ b/src/dev/tsunami_io.cc
@@ -24,6 +24,10 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ * Andrew Schultz
+ * Miguel Serrano
*/
/** @file
@@ -447,7 +451,6 @@ TsunamiIO::read(Packet *pkt)
assert(pkt->result == Packet::Unknown);
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
- pkt->time += pioDelay;
Addr daddr = pkt->getAddr() - pioAddr;
DPRINTF(Tsunami, "io read va=%#x size=%d IOPorrt=%#x\n", pkt->getAddr(),
@@ -511,8 +514,6 @@ TsunamiIO::read(Packet *pkt)
Tick
TsunamiIO::write(Packet *pkt)
{
- pkt->time += pioDelay;
-
assert(pkt->result == Packet::Unknown);
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
Addr daddr = pkt->getAddr() - pioAddr;
diff --git a/src/dev/tsunami_io.hh b/src/dev/tsunami_io.hh
index 71ca0d98f..ee25bbdfd 100644
--- a/src/dev/tsunami_io.hh
+++ b/src/dev/tsunami_io.hh
@@ -24,6 +24,10 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ * Andrew Schultz
+ * Miguel Serrano
*/
/** @file
diff --git a/src/dev/tsunami_pchip.cc b/src/dev/tsunami_pchip.cc
index c430ca0a0..a376b908d 100644
--- a/src/dev/tsunami_pchip.cc
+++ b/src/dev/tsunami_pchip.cc
@@ -24,6 +24,9 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ * Andrew Schultz
*/
/** @file
@@ -70,8 +73,6 @@ TsunamiPChip::read(Packet *pkt)
assert(pkt->result == Packet::Unknown);
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
-
- pkt->time += pioDelay;
pkt->allocate();
Addr daddr = (pkt->getAddr() - pioAddr) >> 6;;
assert(pkt->getSize() == sizeof(uint64_t));
@@ -151,8 +152,6 @@ TsunamiPChip::read(Packet *pkt)
Tick
TsunamiPChip::write(Packet *pkt)
{
- pkt->time += pioDelay;
-
assert(pkt->result == Packet::Unknown);
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
Addr daddr = (pkt->getAddr() - pioAddr) >> 6;
diff --git a/src/dev/tsunami_pchip.hh b/src/dev/tsunami_pchip.hh
index bb84339c9..9f80f7d68 100644
--- a/src/dev/tsunami_pchip.hh
+++ b/src/dev/tsunami_pchip.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
*/
/** @file
diff --git a/src/dev/tsunamireg.h b/src/dev/tsunamireg.h
index a10259900..d603972be 100644
--- a/src/dev/tsunamireg.h
+++ b/src/dev/tsunamireg.h
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
*/
/** @file
diff --git a/src/dev/uart.cc b/src/dev/uart.cc
index 4a9f2b505..f769b720b 100644
--- a/src/dev/uart.cc
+++ b/src/dev/uart.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
*/
/** @file
diff --git a/src/dev/uart.hh b/src/dev/uart.hh
index 2dd15d9b8..f0ae0854c 100644
--- a/src/dev/uart.hh
+++ b/src/dev/uart.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
*/
/** @file
diff --git a/src/dev/uart8250.cc b/src/dev/uart8250.cc
index 8a5a1f1cd..b92527b5a 100644
--- a/src/dev/uart8250.cc
+++ b/src/dev/uart8250.cc
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
*/
/** @file
@@ -114,7 +116,6 @@ Uart8250::read(Packet *pkt)
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
assert(pkt->getSize() == 1);
- pkt->time += pioDelay;
Addr daddr = pkt->getAddr() - pioAddr;
pkt->allocate();
@@ -198,7 +199,6 @@ Uart8250::write(Packet *pkt)
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
assert(pkt->getSize() == 1);
- pkt->time += pioDelay;
Addr daddr = pkt->getAddr() - pioAddr;
DPRINTF(Uart, " write register %#x value %#x\n", daddr, pkt->get<uint8_t>());
diff --git a/src/dev/uart8250.hh b/src/dev/uart8250.hh
index 4b7c2f1e4..44e90132f 100644
--- a/src/dev/uart8250.hh
+++ b/src/dev/uart8250.hh
@@ -24,6 +24,8 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
*/
/** @file