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authorAli Saidi <Ali.Saidi@ARM.com>2011-05-04 20:38:27 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2011-05-04 20:38:27 -0500
commit5f73d4ac9741f58fd00ccd03eac92c0c60817658 (patch)
treee9cf90cd9f490b38090a85e0628ff79d51b971eb /src/dev
parentafd08879d726dbbefa3ff6018088cd6d89b53bbb (diff)
downloadgem5-5f73d4ac9741f58fd00ccd03eac92c0c60817658.tar.xz
ARM: Add snoop control unit device.
Diffstat (limited to 'src/dev')
-rw-r--r--src/dev/arm/RealView.py5
-rw-r--r--src/dev/arm/SConscript1
-rw-r--r--src/dev/arm/a9scu.cc102
-rw-r--r--src/dev/arm/a9scu.hh85
4 files changed, 193 insertions, 0 deletions
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index 8a43c5b8d..dd694cd45 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -70,6 +70,9 @@ class AmbaDmaDevice(DmaDevice):
int_num = Param.UInt32("Interrupt number that connects to GIC")
amba_id = Param.UInt32("ID of AMBA device for kernel detection")
+class A9SCU(BasicPioDevice):
+ type = 'A9SCU'
+
class RealViewCtrl(BasicPioDevice):
type = 'RealViewCtrl'
proc_id = Param.UInt32(0x0C000000, "Platform ID")
@@ -132,6 +135,7 @@ class RealViewPBX(RealView):
clcd = Pl111(pio_addr=0x10020000, int_num=55)
kmi0 = Pl050(pio_addr=0x10006000, int_num=52)
kmi1 = Pl050(pio_addr=0x10007000, int_num=53, is_mouse=True)
+ a9scu = A9SCU(pio_addr=0x1f000000)
cf_ctrl = IdeController(disks=[], pci_func=0, pci_dev=0, pci_bus=0,
io_shift = 1, ctrl_offset = 2, Command = 0x1,
BAR0 = 0x18000000, BAR0Size = '16B',
@@ -162,6 +166,7 @@ class RealViewPBX(RealView):
def attachOnChipIO(self, bus):
self.gic.pio = bus.port
self.l2x0_fake.pio = bus.port
+ self.a9scu.pio = bus.port
# Attach I/O devices to specified bus object. Can't do this
# earlier, since the bus object itself is typically defined at the
diff --git a/src/dev/arm/SConscript b/src/dev/arm/SConscript
index b53010d77..df4b7f22c 100644
--- a/src/dev/arm/SConscript
+++ b/src/dev/arm/SConscript
@@ -42,6 +42,7 @@ Import('*')
if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'arm':
SimObject('RealView.py')
+ Source('a9scu.cc')
Source('amba_device.cc')
Source('amba_fake.cc')
Source('gic.cc')
diff --git a/src/dev/arm/a9scu.cc b/src/dev/arm/a9scu.cc
new file mode 100644
index 000000000..31d38b4ff
--- /dev/null
+++ b/src/dev/arm/a9scu.cc
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2010 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ */
+
+#include "base/intmath.hh"
+#include "base/trace.hh"
+#include "dev/arm/a9scu.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
+#include "sim/system.hh"
+
+A9SCU::A9SCU(Params *p)
+ : BasicPioDevice(p)
+{
+ pioSize = 0x60;
+}
+
+Tick
+A9SCU::read(PacketPtr pkt)
+{
+ assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+ assert(pkt->getSize() == 4);
+ Addr daddr = pkt->getAddr() - pioAddr;
+ pkt->allocate();
+
+ switch(daddr) {
+ case Control:
+ pkt->set(1); // SCU already enabled
+ break;
+ case Config:
+ assert(sys->numContexts() <= 4);
+ int smp_bits, core_cnt;
+ smp_bits = power(2,sys->numContexts()) - 1;
+ core_cnt = sys->numContexts() - 1;
+ pkt->set(smp_bits << 4 | core_cnt);
+ break;
+ default:
+ // Only configuration register is implemented
+ panic("Tried to read SCU at offset %#x\n", daddr);
+ break;
+ }
+ pkt->makeAtomicResponse();
+ return pioDelay;
+
+}
+
+Tick
+A9SCU::write(PacketPtr pkt)
+{
+ assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+
+ Addr daddr = pkt->getAddr() - pioAddr;
+ switch (daddr) {
+ default:
+ // Nothing implemented at this point
+ panic("Tried to write SCU at offset %#x\n", daddr);
+ break;
+ }
+ pkt->makeAtomicResponse();
+ return pioDelay;
+}
+
+A9SCU *
+A9SCUParams::create()
+{
+ return new A9SCU(this);
+}
diff --git a/src/dev/arm/a9scu.hh b/src/dev/arm/a9scu.hh
new file mode 100644
index 000000000..881401ca6
--- /dev/null
+++ b/src/dev/arm/a9scu.hh
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2010 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ */
+
+#ifndef __DEV_ARM_A9SCU_HH__
+#define __DEV_ARM_A9SCU_HH__
+
+#include "base/range.hh"
+#include "dev/io_device.hh"
+#include "params/A9SCU.hh"
+
+/** @file
+ * This defines the snoop control unit register on an A9
+ */
+
+class A9SCU : public BasicPioDevice
+{
+ protected:
+ enum {
+ Control = 0x00,
+ Config = 0x04,
+ };
+
+ public:
+ typedef A9SCUParams Params;
+
+ /**
+ * The constructor for RealView just registers itself with the MMU.
+ * @param p params structure
+ */
+ A9SCU(Params *p);
+
+ /**
+ * Handle a read to the device
+ * @param pkt The memory request.
+ * @param data Where to put the data.
+ */
+ virtual Tick read(PacketPtr pkt);
+
+ /**
+ * All writes are panic.
+ * @param pkt The memory request.
+ * @param data the data
+ */
+ virtual Tick write(PacketPtr pkt);
+};
+
+
+#endif // __DEV_ARM_A9SCU_HH__
+