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| author | Gabe Black <gabeblack@google.com> | 2019-09-02 21:26:12 -0700 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2019-10-19 01:45:48 +0000 |
| commit | ae390c629f2a10fd6a1c2eb50b7d3510d6e091da (patch) | |
| tree | 51f12635838755ef7519bea1c72bfb96e0214336 /src/dev | |
| parent | 1c047f8b92f5708bbef50d24cf47902d5da313e3 (diff) | |
| download | gem5-ae390c629f2a10fd6a1c2eb50b7d3510d6e091da.tar.xz | |
arch: Make a base class for Interrupts.
That abstracts the ISA further from the CPU, getting us a small step
closer to being able to build in more than one ISA at a time.
Change-Id: Ibf7e26a3df411ffe994ac1e11d2a53b656863223
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20831
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/dev')
| -rw-r--r-- | src/dev/x86/i82094aa.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/dev/x86/i82094aa.cc b/src/dev/x86/i82094aa.cc index d6742a780..ba50ad57f 100644 --- a/src/dev/x86/i82094aa.cc +++ b/src/dev/x86/i82094aa.cc @@ -216,8 +216,9 @@ X86ISA::I82094AA::signalInterrupt(int line) } } else { for (int i = 0; i < numContexts; i++) { - Interrupts *localApic = sys->getThreadContext(i)-> + BaseInterrupts *base_int = sys->getThreadContext(i)-> getCpuPtr()->getInterruptController(0); + auto *localApic = dynamic_cast<Interrupts *>(base_int); if ((localApic->readReg(APIC_LOGICAL_DESTINATION) >> 24) & message.destination) { apics.push_back(localApic->getInitialApicId()); |