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authorTony Gutierrez <anthony.gutierrez@amd.com>2016-10-26 22:47:43 -0400
committerTony Gutierrez <anthony.gutierrez@amd.com>2016-10-26 22:47:43 -0400
commit844fb845a51b15f13c7c744e0d5fdf5567c3da98 (patch)
tree407cd19c909cdf3cd4da7947ad86dfbd4470ef68 /src/gpu-compute/cl_driver.cc
parentd327cdba078e0956596513b518731e9ec730723f (diff)
downloadgem5-844fb845a51b15f13c7c744e0d5fdf5567c3da98.tar.xz
gpu-compute, hsail: make the PC a byte address, not an instruction index
currently the PC is incremented on an instruction granularity, and not as an instruction's byte address. machine ISA instructions assume the PC is a byte address, and is incremented accordingly. here we make the GPU model, and the HSAIL instructions treat the PC as a byte address as well.
Diffstat (limited to 'src/gpu-compute/cl_driver.cc')
-rw-r--r--src/gpu-compute/cl_driver.cc5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/gpu-compute/cl_driver.cc b/src/gpu-compute/cl_driver.cc
index d3950ec04..d6d1b1334 100644
--- a/src/gpu-compute/cl_driver.cc
+++ b/src/gpu-compute/cl_driver.cc
@@ -79,7 +79,7 @@ ClDriver::ClDriver(ClDriverParams *p)
kernelInfo[i].code_offs = code_offs;
name_offs += k->name().size() + 1;
- code_offs += k->numInsts() * sizeof(GPUStaticInst*);
+ code_offs += k->numInsts() * sizeof(TheGpuISA::RawMachInst);
}
}
@@ -130,7 +130,8 @@ ClDriver::ioctl(LiveProcess *process, ThreadContext *tc, unsigned req)
HsaCode *k = kernels[i];
// add one for terminating '\0'
sizes->string_table_size += k->name().size() + 1;
- sizes->code_size += k->numInsts() * sizeof(GPUStaticInst*);
+ sizes->code_size +=
+ k->numInsts() * sizeof(TheGpuISA::RawMachInst);
}
sizes.copyOut(tc->getMemProxy());