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author | Tony Gutierrez <anthony.gutierrez@amd.com> | 2016-10-26 22:47:19 -0400 |
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committer | Tony Gutierrez <anthony.gutierrez@amd.com> | 2016-10-26 22:47:19 -0400 |
commit | 00a6346c91f6e09eb9c0f4cf61a7d72932a1282f (patch) | |
tree | 3ca7c5b2dedd8ed8151566b4d5abec95a06f4faf /src/gpu-compute/global_memory_pipeline.hh | |
parent | 7ac38849abaf6aeccf39137bc8acb9e44d192e82 (diff) | |
download | gem5-00a6346c91f6e09eb9c0f4cf61a7d72932a1282f.tar.xz |
hsail, gpu-compute: remove doGm/SmReturn add completeAcc
we are removing doGmReturn from the GM pipe, and adding completeAcc()
implementations for the HSAIL mem ops. the behavior in doGmReturn is
dependent on HSAIL and HSAIL mem ops, however the completion phase
of memory ops in machine ISA can be very different, even amongst individual
machine ISA mem ops. so we remove this functionality from the pipeline and
allow it to be implemented by the individual instructions.
Diffstat (limited to 'src/gpu-compute/global_memory_pipeline.hh')
-rw-r--r-- | src/gpu-compute/global_memory_pipeline.hh | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/gpu-compute/global_memory_pipeline.hh b/src/gpu-compute/global_memory_pipeline.hh index ed49f6f6b..368a15079 100644 --- a/src/gpu-compute/global_memory_pipeline.hh +++ b/src/gpu-compute/global_memory_pipeline.hh @@ -62,8 +62,6 @@ class GlobalMemPipeline void init(ComputeUnit *cu); void exec(); - template<typename c0, typename c1> void doGmReturn(GPUDynInstPtr m); - std::queue<GPUDynInstPtr> &getGMReqFIFO() { return gmIssuedRequests; } std::queue<GPUDynInstPtr> &getGMStRespFIFO() { return gmReturnedStores; } std::queue<GPUDynInstPtr> &getGMLdRespFIFO() { return gmReturnedLoads; } @@ -89,6 +87,12 @@ class GlobalMemPipeline const std::string &name() const { return _name; } void regStats(); + void + incLoadVRFBankConflictCycles(int num_cycles) + { + loadVrfBankConflictCycles += num_cycles; + } + private: ComputeUnit *computeUnit; std::string _name; |