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| author | Daniel R. Carvalho <odanrc@yahoo.com.br> | 2018-09-19 10:19:06 +0200 |
|---|---|---|
| committer | Daniel Carvalho <odanrc@yahoo.com.br> | 2018-09-19 09:13:25 +0000 |
| commit | b53dd6d12efafb574989226911a7b0bc921df24d (patch) | |
| tree | 766c57af77b7297691a60eed5cc5b45255c6a594 /src/gpu-compute/gpu_dyn_inst.cc | |
| parent | b3ef93166f76b3f76fe5254322d3fcb0f5e4b559 (diff) | |
| download | gem5-b53dd6d12efafb574989226911a7b0bc921df24d.tar.xz | |
mem-cache: Fix non-bijective function in Skewed caches
The hash() function must be bijective for the skewed caches to work,
however when the hashing is done on top of a one-bit address, the
MSB and LSB refer to the same bit, and therefore their xor will
always be zero.
This patch adds a fatal error to not allow the user to set an invalid
value for the number of sets that would generate that bug.
As a side note, the missing header for the bitfields functions has
been added.
Change-Id: I35a03ac5fdc4debb091f7f2db5db33568d0b0021
Reviewed-on: https://gem5-review.googlesource.com/12724
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/gpu-compute/gpu_dyn_inst.cc')
0 files changed, 0 insertions, 0 deletions