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authorTony Gutierrez <anthony.gutierrez@amd.com>2016-10-26 22:47:19 -0400
committerTony Gutierrez <anthony.gutierrez@amd.com>2016-10-26 22:47:19 -0400
commit00a6346c91f6e09eb9c0f4cf61a7d72932a1282f (patch)
tree3ca7c5b2dedd8ed8151566b4d5abec95a06f4faf /src/gpu-compute/gpu_dyn_inst.hh
parent7ac38849abaf6aeccf39137bc8acb9e44d192e82 (diff)
downloadgem5-00a6346c91f6e09eb9c0f4cf61a7d72932a1282f.tar.xz
hsail, gpu-compute: remove doGm/SmReturn add completeAcc
we are removing doGmReturn from the GM pipe, and adding completeAcc() implementations for the HSAIL mem ops. the behavior in doGmReturn is dependent on HSAIL and HSAIL mem ops, however the completion phase of memory ops in machine ISA can be very different, even amongst individual machine ISA mem ops. so we remove this functionality from the pipeline and allow it to be implemented by the individual instructions.
Diffstat (limited to 'src/gpu-compute/gpu_dyn_inst.hh')
-rw-r--r--src/gpu-compute/gpu_dyn_inst.hh4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gpu-compute/gpu_dyn_inst.hh b/src/gpu-compute/gpu_dyn_inst.hh
index c07d85d78..527b87b4c 100644
--- a/src/gpu-compute/gpu_dyn_inst.hh
+++ b/src/gpu-compute/gpu_dyn_inst.hh
@@ -258,6 +258,10 @@ class GPUDynInst : public GPUExecContext
// Initiate the specified memory operation, by creating a
// memory request and sending it off to the memory system.
void initiateAcc(GPUDynInstPtr gpuDynInst);
+ // Complete the specified memory operation, by writing
+ // value back to the RF in the case of a load or atomic
+ // return or, in the case of a store, we do nothing
+ void completeAcc(GPUDynInstPtr gpuDynInst);
void updateStats();