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| author | Gabe Black <gabeblack@google.com> | 2018-10-13 00:54:32 -0700 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2019-01-16 20:27:47 +0000 |
| commit | cf0f625b47a8e0334fc3fe8c0c2cdf5aaaf3389e (patch) | |
| tree | 75505d60b69951ec0a99ca82e8621803c95d921d /src/gpu-compute/gpu_exec_context.hh | |
| parent | 0c4515ce1ff2a4e40d243df734af2a67cb8b1ad1 (diff) | |
| download | gem5-cf0f625b47a8e0334fc3fe8c0c2cdf5aaaf3389e.tar.xz | |
cpu: dev: sim: gpu-compute: Banish some ISA specific register types.
These types are IntReg, FloatReg, FloatRegBits, and MiscReg. There are
some remaining types, specifically the vector registers and the CCReg.
I'm less familiar with these new types of registers, and so will look
at getting rid of them at some later time.
Change-Id: Ide8f76b15c531286f61427330053b44074b8ac9b
Reviewed-on: https://gem5-review.googlesource.com/c/13624
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/gpu-compute/gpu_exec_context.hh')
| -rw-r--r-- | src/gpu-compute/gpu_exec_context.hh | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/gpu-compute/gpu_exec_context.hh b/src/gpu-compute/gpu_exec_context.hh index c5f9929b9..4f67dba47 100644 --- a/src/gpu-compute/gpu_exec_context.hh +++ b/src/gpu-compute/gpu_exec_context.hh @@ -37,6 +37,7 @@ #define __GPU_EXEC_CONTEXT_HH__ #include "arch/gpu_isa.hh" +#include "base/types.hh" #include "config/the_gpu_isa.hh" class ComputeUnit; @@ -49,8 +50,8 @@ class GPUExecContext Wavefront* wavefront(); ComputeUnit* computeUnit(); - TheGpuISA::MiscReg readMiscReg(int opIdx) const; - void writeMiscReg(int opIdx, TheGpuISA::MiscReg operandVal); + RegVal readMiscReg(int opIdx) const; + void writeMiscReg(int opIdx, RegVal operandVal); protected: ComputeUnit *cu; |