summaryrefslogtreecommitdiff
path: root/src/gpu-compute/vector_register_file.cc
diff options
context:
space:
mode:
authorTony Gutierrez <anthony.gutierrez@amd.com>2016-10-26 22:47:11 -0400
committerTony Gutierrez <anthony.gutierrez@amd.com>2016-10-26 22:47:11 -0400
commit7ac38849abaf6aeccf39137bc8acb9e44d192e82 (patch)
tree7658e9d741604b310f871756cf051558b30e115e /src/gpu-compute/vector_register_file.cc
parente1ad8035a379cea98ecef92e78d2894f60b2eedd (diff)
downloadgem5-7ac38849abaf6aeccf39137bc8acb9e44d192e82.tar.xz
gpu-compute: remove inst enums and use bit flag for attributes
this patch removes the GPUStaticInst enums that were defined in GPU.py. instead, a simple set of attribute flags that can be set in the base instruction class are used. this will help unify the attributes of HSAIL and machine ISA instructions within the model itself. because the static instrution now carries the attributes, a GPUDynInst must carry a pointer to a valid GPUStaticInst so a new static kernel launch instruction is added, which carries the attributes needed to perform a the kernel launch.
Diffstat (limited to 'src/gpu-compute/vector_register_file.cc')
-rw-r--r--src/gpu-compute/vector_register_file.cc5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/gpu-compute/vector_register_file.cc b/src/gpu-compute/vector_register_file.cc
index c43d765af..c50c06cc6 100644
--- a/src/gpu-compute/vector_register_file.cc
+++ b/src/gpu-compute/vector_register_file.cc
@@ -38,7 +38,6 @@
#include <string>
#include "base/misc.hh"
-#include "gpu-compute/code_enums.hh"
#include "gpu-compute/compute_unit.hh"
#include "gpu-compute/gpu_dyn_inst.hh"
#include "gpu-compute/shader.hh"
@@ -153,8 +152,8 @@ VectorRegisterFile::operandsReady(Wavefront *w, GPUDynInstPtr ii) const
void
VectorRegisterFile::exec(GPUDynInstPtr ii, Wavefront *w)
{
- bool loadInstr = IS_OT_READ(ii->opType());
- bool atomicInstr = IS_OT_ATOMIC(ii->opType());
+ bool loadInstr = ii->isLoad();
+ bool atomicInstr = ii->isAtomic() || ii->isMemFence();
bool loadNoArgInstr = loadInstr && !ii->isArgLoad();