mem: Remove threadId from memory request class

In general, the ThreadID parameter is unnecessary in the memory system
as the ContextID is what is used for the purposes of locks/wakeups.
Since we allocate sequential ContextIDs for each thread on MT-enabled
CPUs, ThreadID is unnecessary as the CPUs can identify the requesting
thread through sideband info (SenderState / LSQ entries) or ContextID
offset from the base ContextID for a cpu.

This is a re-spin of 20264eb after the revert (bd1c6789) and includes
some fixes of that commit.

5 files changed, 8 insertions, 8 deletions

diff --git a/src/gpu-compute/compute_unit.cc b/src/gpu-compute/compute_unit.cc
index 1387f9b56..49029f815 100644
--- a/src/gpu-compute/compute_unit.cc
+++ b/src/gpu-compute/compute_unit.cc
@@ -982,7 +982,7 @@ ComputeUnit::injectGlobalMemFence(GPUDynInstPtr gpuDynInst, bool kernelLaunch,
                                   Request* req)
 {
     if (!req) {
-        req = new Request(0, 0, 0, 0, masterId(), 0, gpuDynInst->wfDynId, -1);
+        req = new Request(0, 0, 0, 0, masterId(), 0, gpuDynInst->wfDynId);
     }
     req->setPaddr(0);
     if (kernelLaunch) {
diff --git a/src/gpu-compute/dispatcher.cc b/src/gpu-compute/dispatcher.cc
index 55e4be72a..95c0c56a2 100644
--- a/src/gpu-compute/dispatcher.cc
+++ b/src/gpu-compute/dispatcher.cc
@@ -222,7 +222,7 @@ GpuDispatcher::write(PacketPtr pkt)
         ndr->addrToNotify = (volatile bool*)curTask.addrToNotify;
         ndr->numDispLeft = (volatile uint32_t*)curTask.numDispLeft;
         ndr->dispatchId = nextId;
-        ndr->curTid = pkt->req->threadId();
+        ndr->curCid = pkt->req->contextId();
         DPRINTF(GPUDisp, "launching kernel %d\n",nextId);
         execIds.push(nextId);
         ++nextId;
@@ -272,7 +272,7 @@ GpuDispatcher::exec()
 
         while (ndRangeMap[execId].wg_disp_rem) {
             //update the thread context
-            shader->updateThreadContext(ndRangeMap[execId].curTid);
+            shader->updateContext(ndRangeMap[execId].curCid);
 
             // attempt to dispatch_workgroup
             if (!shader->dispatch_workgroups(&ndRangeMap[execId])) {
diff --git a/src/gpu-compute/ndrange.hh b/src/gpu-compute/ndrange.hh
index d1ad35d4b..db6dc455f 100644
--- a/src/gpu-compute/ndrange.hh
+++ b/src/gpu-compute/ndrange.hh
@@ -64,7 +64,7 @@ struct NDRange
     volatile bool *addrToNotify;
     volatile uint32_t *numDispLeft;
     int dispatchId;
-    int curTid; // Current thread id
+    int curCid; // Current context id
 };
 
 #endif // __NDRANGE_HH__
diff --git a/src/gpu-compute/shader.cc b/src/gpu-compute/shader.cc
index 31aa1e4cf..d02f95d29 100644
--- a/src/gpu-compute/shader.cc
+++ b/src/gpu-compute/shader.cc
@@ -116,10 +116,10 @@ Shader::~Shader()
 }
 
 void
-Shader::updateThreadContext(int tid) {
-    // thread context of the thread which dispatched work
+Shader::updateContext(int cid) {
+    // context of the thread which dispatched work
     assert(cpuPointer);
-    gpuTc = cpuPointer->getContext(tid);
+    gpuTc = cpuPointer->getContext(cid);
     assert(gpuTc);
 }
 
diff --git a/src/gpu-compute/shader.hh b/src/gpu-compute/shader.hh
index 91ea8aae0..c1f741d6a 100644
--- a/src/gpu-compute/shader.hh
+++ b/src/gpu-compute/shader.hh
@@ -205,7 +205,7 @@ class Shader : public SimObject
     bool dispatch_workgroups(NDRange *ndr);
     Addr mmap(int length);
     void functionalTLBAccess(PacketPtr pkt, int cu_id, BaseTLB::Mode mode);
-    void updateThreadContext(int tid);
+    void updateContext(int cid);
     void hostWakeUp(BaseCPU *cpu);
 };