diff options
| author | Nathan Binkert <nate@binkert.org> | 2007-07-26 23:15:49 -0700 |
|---|---|---|
| committer | Nathan Binkert <nate@binkert.org> | 2007-07-26 23:15:49 -0700 |
| commit | f0fef8f850b0c5aa73337ca11b26169163b2b2e1 (patch) | |
| tree | d49d3492618ee85717554cddbe62cba1b5e7fb9c /src/kern | |
| parent | 6b73ff43ff58502c80050c7aeff5a08a4ce61f87 (diff) | |
| parent | cda354b07035f73a3b220f89014721300d36a815 (diff) | |
| download | gem5-f0fef8f850b0c5aa73337ca11b26169163b2b2e1.tar.xz | |
Merge python and x86 changes with cache branch
--HG--
extra : convert_revision : e06a950964286604274fba81dcca362d75847233
Diffstat (limited to 'src/kern')
| -rw-r--r-- | src/kern/tru64/tru64.hh | 2 | ||||
| -rw-r--r-- | src/kern/tru64/tru64_events.cc | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/kern/tru64/tru64.hh b/src/kern/tru64/tru64.hh index a7703be7c..70fb4d688 100644 --- a/src/kern/tru64/tru64.hh +++ b/src/kern/tru64/tru64.hh @@ -690,7 +690,7 @@ class Tru64 : public OperatingSystem tc->clearArchRegs(); - tc->setIntReg(TheISA::ArgumentReg0, gtoh(attrp->registers.a0)); + tc->setIntReg(TheISA::ArgumentReg[0], gtoh(attrp->registers.a0)); tc->setIntReg(27/*t12*/, gtoh(attrp->registers.pc)); tc->setIntReg(TheISA::StackPointerReg, gtoh(attrp->registers.sp)); tc->setMiscRegNoEffect(AlphaISA::MISCREG_UNIQ, uniq_val); diff --git a/src/kern/tru64/tru64_events.cc b/src/kern/tru64/tru64_events.cc index 4db5df067..c84b25dab 100644 --- a/src/kern/tru64/tru64_events.cc +++ b/src/kern/tru64/tru64_events.cc @@ -51,7 +51,7 @@ BadAddrEvent::process(ThreadContext *tc) // annotation for vmunix::badaddr in: // simos/simulation/apps/tcl/osf/tlaser.tcl - uint64_t a0 = tc->readIntReg(ArgumentReg0); + uint64_t a0 = tc->readIntReg(ArgumentReg[0]); AddrRangeList resp; bool snoop; |