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author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-05-27 21:34:37 -0700 |
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committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-05-27 21:34:37 -0700 |
commit | 075f4b108a325e9cf2b903cd17fdbcac7598b6b0 (patch) | |
tree | 1d92cb303f6b0f7547ed0119f757fb7b30d2833b /src/mem/SConscript | |
parent | 6a48f6b67d41b03e04aaba8e5fbe4e20059a9b9f (diff) | |
parent | 35147170f91ccbc73d3e75440a5301f758e54dfc (diff) | |
download | gem5-075f4b108a325e9cf2b903cd17fdbcac7598b6b0.tar.xz |
Merge vm1.(none):/home/stever/bk/newmem-head
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : fba7efd444e1ca9738385dd4662a33feab357e79
Diffstat (limited to 'src/mem/SConscript')
-rw-r--r-- | src/mem/SConscript | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mem/SConscript b/src/mem/SConscript index 61fb766d6..bbb1e96fe 100644 --- a/src/mem/SConscript +++ b/src/mem/SConscript @@ -30,6 +30,11 @@ Import('*') +SimObject('Bridge.py') +SimObject('Bus.py') +SimObject('PhysicalMemory.py') +SimObject('MemObject.py') + Source('bridge.cc') Source('bus.cc') Source('dram.cc') |