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| author | Marco Elver <Marco.Elver@ARM.com> | 2014-12-23 09:31:17 -0500 |
|---|---|---|
| committer | Marco Elver <Marco.Elver@ARM.com> | 2014-12-23 09:31:17 -0500 |
| commit | dd0f3943e20072021987780d6b15f531a4be2fca (patch) | |
| tree | 2cbab7ddb2c4782455db28020e643fe0987ef991 /src/mem/SConscript | |
| parent | 184fefbb3bbaf93bccd65e73d3d08c7decc16e8a (diff) | |
| download | gem5-dd0f3943e20072021987780d6b15f531a4be2fca.tar.xz | |
mem: Add MemChecker and MemCheckerMonitor
This patch adds the MemChecker and MemCheckerMonitor classes. While
MemChecker can be integrated anywhere in the system and is independent,
the most convenient usage is through the MemCheckerMonitor -- this
however, puts limitations on where the MemChecker is able to observe
read/write transactions.
Diffstat (limited to 'src/mem/SConscript')
| -rw-r--r-- | src/mem/SConscript | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mem/SConscript b/src/mem/SConscript index e7d2c1bac..e6973b1ac 100644 --- a/src/mem/SConscript +++ b/src/mem/SConscript @@ -79,6 +79,10 @@ if env['HAVE_DRAMSIM']: Source('dramsim2_wrapper.cc') Source('dramsim2.cc') +SimObject('MemChecker.py') +Source('mem_checker.cc') +Source('mem_checker_monitor.cc') + DebugFlag('AddrRanges') DebugFlag('BaseXBar') DebugFlag('CoherentXBar') @@ -99,3 +103,6 @@ DebugFlag('MemoryAccess') DebugFlag('PacketQueue') DebugFlag("DRAMSim2") + +DebugFlag("MemChecker") +DebugFlag("MemCheckerMonitor") |