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authorDaniel Sanchez <sanchezd@stanford.edu>2009-05-11 10:38:46 -0700
committerDaniel Sanchez <sanchezd@stanford.edu>2009-05-11 10:38:46 -0700
commit93f2f69657d0a2420a2c86b71505e6d27e6e2a38 (patch)
tree8022fec4e3f70b9fb777518d26116eb99b962f80 /src/mem/SConscript
parentebf2f5aaddcb81ba39692b716ed9ad658df27cd8 (diff)
downloadgem5-93f2f69657d0a2420a2c86b71505e6d27e6e2a38.tar.xz
ruby: Working M5 interface and updated Ruby interface.
This changeset also includes a lot of work from Derek Hower <drh5@cs.wisc.edu> RubyMemory is now both a driver for Ruby and a port for M5. Changed makeRequest/hitCallback interface. Brought packets (superficially) into the sequencer. Modified tester infrastructure to be packet based. and Ruby can be used together through the example ruby_se.py script. SPARC parallel applications work, and the timing *seems* right from combined M5/Ruby debug traces. To run, % build/ALPHA_SE/m5.debug configs/example/ruby_se.py -c tests/test-progs/hello/bin/alpha/linux/hello -n 4 -t
Diffstat (limited to 'src/mem/SConscript')
-rw-r--r--src/mem/SConscript4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mem/SConscript b/src/mem/SConscript
index 0b0017f81..87498d21d 100644
--- a/src/mem/SConscript
+++ b/src/mem/SConscript
@@ -32,8 +32,9 @@ Import('*')
SimObject('Bridge.py')
SimObject('Bus.py')
-SimObject('PhysicalMemory.py')
SimObject('MemObject.py')
+SimObject('PhysicalMemory.py')
+SimObject('RubyMemory.py')
Source('bridge.cc')
Source('bus.cc')
@@ -44,6 +45,7 @@ Source('physical.cc')
Source('port.cc')
Source('tport.cc')
Source('mport.cc')
+Source('rubymem.cc')
if env['FULL_SYSTEM']:
Source('vport.cc')