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author | Gabe Black <gblack@eecs.umich.edu> | 2011-10-16 05:06:40 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2011-10-16 05:06:40 -0700 |
commit | 6ba3ebae43bbc7267e7f013bed949cc3339f0308 (patch) | |
tree | 6eb698cd17648481cf829778d6fe60c5f4d3192a /src/mem/SConscript | |
parent | 3595b0c5a1a3e398a7efae932cd4175cd1ca3f0e (diff) | |
download | gem5-6ba3ebae43bbc7267e7f013bed949cc3339f0308.tar.xz |
SE/FS: Build in the tport in FS mode.
Diffstat (limited to 'src/mem/SConscript')
-rw-r--r-- | src/mem/SConscript | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/SConscript b/src/mem/SConscript index c446772d8..8995ed736 100644 --- a/src/mem/SConscript +++ b/src/mem/SConscript @@ -47,10 +47,10 @@ if env['TARGET_ISA'] != 'no': SimObject('PhysicalMemory.py') Source('dram.cc') Source('physical.cc') + Source('translating_port.cc') if not env['FULL_SYSTEM'] and env['TARGET_ISA'] != 'no': Source('page_table.cc') - Source('translating_port.cc') DebugFlag('Bus') DebugFlag('BusAddrRanges') |