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| author | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:26 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:26 -0400 |
| commit | 7bc3eaec7a7a67b821774bea4298418241cbf815 (patch) | |
| tree | 46c5bff6a0dbdf722afad2566cba1a97afffb0c9 /src/mem/SimpleDRAM.py | |
| parent | 2a675aecb904143327befde70704d87c85fe7ea5 (diff) | |
| download | gem5-7bc3eaec7a7a67b821774bea4298418241cbf815.tar.xz | |
mem: Allow disabling of tXAW through a 0 activation limit
This patch fixes an issue where an activation limit of 0 was not
allowed. With this patch, setting the limit to 0 simply disables the
tXAW constraint.
Diffstat (limited to 'src/mem/SimpleDRAM.py')
0 files changed, 0 insertions, 0 deletions