mem: Rename Bus to XBar to better reflect its behaviour

This patch changes the name of the Bus classes to XBar to better
reflect the actual timing behaviour. The actual instances in the
config scripts are not renamed, and remain as e.g. iobus or membus.

As part of this renaming, the code has also been clean up slightly,
making use of range-based for loops and tidying up some comments. The
only changes outside the bus/crossbar code is due to the delay
variables in the packet.

--HG--
rename : src/mem/Bus.py => src/mem/XBar.py
rename : src/mem/coherent_bus.cc => src/mem/coherent_xbar.cc
rename : src/mem/coherent_bus.hh => src/mem/coherent_xbar.hh
rename : src/mem/noncoherent_bus.cc => src/mem/noncoherent_xbar.cc
rename : src/mem/noncoherent_bus.hh => src/mem/noncoherent_xbar.hh
rename : src/mem/bus.cc => src/mem/xbar.cc
rename : src/mem/bus.hh => src/mem/xbar.hh

1 files changed, 5 insertions, 7 deletions

diff --git a/src/mem/bridge.hh b/src/mem/bridge.hh
index e672c1f7a..a79d67484 100644
--- a/src/mem/bridge.hh
+++ b/src/mem/bridge.hh
@@ -44,7 +44,7 @@
 
 /**
  * @file
- * Declaration of a memory-mapped bus bridge that connects a master
+ * Declaration of a memory-mapped bridge that connects a master
  * and a slave through a request and response queue.
  */
 
@@ -58,7 +58,7 @@
 #include "params/Bridge.hh"
 
 /**
- * A bridge is used to interface two different busses (or in general a
+ * A bridge is used to interface two different crossbars (or in general a
  * memory-mapped master and slave), with buffering for requests and
  * responses. The bridge has a fixed delay for packets passing through
  * it and responds to a fixed set of address ranges.
@@ -125,8 +125,7 @@ class Bridge : public MemObject
         Bridge& bridge;
 
         /**
-         * Master port on the other side of the bridge (connected to
-         * the other bus).
+         * Master port on the other side of the bridge.
          */
         BridgeMasterPort& masterPort;
 
@@ -241,8 +240,7 @@ class Bridge : public MemObject
         Bridge& bridge;
 
         /**
-         * The slave port on the other side of the bridge (connected
-         * to the other bus).
+         * The slave port on the other side of the bridge.
          */
         BridgeSlavePort& slavePort;
 
@@ -343,4 +341,4 @@ class Bridge : public MemObject
     Bridge(Params *p);
 };
 
-#endif //__MEM_BUS_HH__
+#endif //__MEM_BRIDGE_HH__