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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-05-23 17:16:45 -0400 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-05-23 17:16:45 -0400 |
| commit | cf826ae296a4277bdf2ce46e4484295efde5a3c2 (patch) | |
| tree | bab4ed90c6c4f71b448fcf795abd6ada66c98fdb /src/mem/bridge.hh | |
| parent | 20051d41d50a717b6aa384e59039ca987c284932 (diff) | |
| download | gem5-cf826ae296a4277bdf2ce46e4484295efde5a3c2.tar.xz | |
Minor fixes for full-system timing memory.
Need to rewrite bus bridge to get any further.
src/dev/io_device.cc:
Set packet dest on timing responses.
src/mem/bus.cc:
Fix dest addr bounds check assertion.
Add assertion to catch infinite loopbacks.
src/mem/physical.cc:
Add comment.
--HG--
extra : convert_revision : 419b65a3a61e2d099884dbda117b338dffd80896
Diffstat (limited to 'src/mem/bridge.hh')
0 files changed, 0 insertions, 0 deletions